參數(shù)資料
型號： M38867M8A-A01HP
廠商： Mitsubishi Electric Corporation
英文描述： BUTT SPLICE INSULKRIMP TAPED (B-231XT)
中文描述： 單芯片8位CMOS微機
文件頁數(shù)： 19/110頁
文件大小： 1601K
代理商： M38867M8A-A01HP
19
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
INTERRUPTS
Interrupts occur by 16 sources among 21 sources: nine external,
eleven internal, and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the
corresponding interrupt request and enable bits are “1” and the in-
terrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The BRK instruction cannot be disabled with any flag or bit. The I
(interrupt disable) flag disables all interrupts except the BRK in-
struction interrupt.
When several interrupts occur at the same time, the interrupts are
received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are auto-
matically performed:
1. The contents of the program counter and the processor status
register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
3. The interrupt jump destination address is read from the vector
table into the program counter.
Interrupt Source Selection
Any of the following interrupt sources can be selected by the inter-
rupt source selection register (address 0039
16
).
1. INT
0
or Input buffer full
2. INT
1
or Output buffer empty
3. Serial I/O1 transmission or S
CL
S
DA
4. CNTR
0
or S
CL
S
DA
5. Serial I/O2 or I
2
C
6. INT
2
or I
2
C
7. CNTR
1
or Key-on wake-up
8. A-D conversion or Key-on wake-up
External Interrupt Pin Selection
The occurrence sources of the external interrupt INT
2
, INT
3
, and
INT
4
can be selected from either input from INT
20
, INT
30
, INT
40
pin, or input from INT
21
, INT
31
, INT
41
pin by the INT
2
, INT
3
, INT
4
interrupt switch bit (bit 4 of address 002F
16
).
I
Notes
When setting of the following register or bit is changed, the inter-
rupt request bit may be set to “1.”
Interrupt edge selection register (address 003A
16
)
Interrupt source selection register (address 0039
16
)
INT
2
, INT
3
, INT
4
interrupt switch bit of
P
ort control register 2 (bit
4 of address 002F
16
)
Accept the interrupt after clearing the interrupt request bit to “0”
after interrupt is disabled and the above register or bit is set.
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