參數(shù)資料
型號(hào): M38869MFA
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 95/110頁(yè)
文件大小: 1601K
代理商: M38869MFA
95
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Table 39 Timing requirements (2)
(V
CC
= 2.7 to 4.0 V, V
SS
= 0 V, T
a
= –20 to 85 °C, unless otherwise noted)
Reset input “L” pulse width
Main clock input cycle time
Main clock input “H” pulse width
Main clock input “L” pulse width
Sub-clock input cycle time
Sub-clock input “H” pulse width
Sub-clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
, INT
1,
INT
20,
INT
30,
INT
40
, INT
21,
INT
31,
INT
41
input “H” pulse width
t
W
(RESET)
t
C
(X
IN
)
t
WH
(X
IN
)
t
WL
(X
IN
)
t
C
(X
CIN
)
t
WH
(X
CIN
)
t
WL
(X
CIN
)
t
C
(CNTR)
t
WH
(CNTR)
t
WL
(CNTR)
t
WH
(INT)
t
WL
(INT)
Limits
μ
s
ns
ns
ns
μ
s
μ
s
μ
s
ns
ns
ns
ns
ns
Parameter
Min.
2
1000/(4.5V
CC
–8)
400/(4.5V
CC
–8)
400/(4.5V
CC
–8)
20
5
5
500
230
230
230
230
Typ.
Max.
Symbol
Unit
Note :
When bit 6 of address 001A
16
is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A
16
is “0” (UART).
t
C
(S
CLK1
)
t
WH
(S
CLK1
)
t
WL
(S
CLK1
)
t
su
(R
x
D-S
CLK1
)
t
h
(S
CLK1
-R
x
D)
t
C
(S
CLK2
)
t
WH
(S
CLK2
)
t
WL
(S
CLK2
)
t
su
(S
IN2
-S
CLK2
)
t
h
(S
CLK2
-S
IN2
)
INT
0
, INT
1,
INT
20,
INT
30,
INT
40
, INT
21,
INT
31,
INT
41
input “L” pulse width
Serial I/O1 clock input cycle time
(Note)
Serial I/O1 clock
input “H” pulse width
(Note)
Serial I/O1 clock
input “L” pulse width
(Note)
Serial I/O1 input setup time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock
input “H” pulse width
Serial I/O2 clock
input “L” pulse width
Serial I/O2 input setup time
Serial I/O2 input hold time
2000
950
950
400
200
2000
950
950
400
300
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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