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    參數(shù)資料
    型號: M38B44E6H-XXXXFP
    廠商: Mitsubishi Electric Corporation
    英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
    中文描述: 單芯片8位CMOS微機
    文件頁數(shù): 20/78頁
    文件大?。?/td> 1214K
    代理商: M38B44E6H-XXXXFP
    20
    38B4 Group
    SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
    MITSUBISHI MICROCOMPUTERS
    INTERRUPTS
    Interrupts occur by twenty one sources: five external, fifteen internal,
    and one software.
    Interrupt Control
    Each interrupt except the BRK instruction interrupt have both an
    interrupt request bit and an interrupt enable bit, and is controlled by
    the interrupt disable flag. An interrupt occurs if the corresponding
    interrupt request and enable bits are “1” and the interrupt disable flag
    is “0”. Interrupt enable bits can be set or cleared by software. Inter-
    rupt request bits can be cleared by software, but cannot be set by
    software. The BRK instruction interrupt and reset cannot be disabled
    with any flag or bit. The I flag disables all interrupts except the BRK
    instruction interrupt and reset. If several interrupts requests occurs
    at the same time the interrupt with highest priority is accepted first.
    Interrupt Operation
    Upon acceptance of an interrupt the following operations are auto-
    matically performed:
    1. The contents of the program counter and processor status
    register are automatically pushed onto the stack.
    2. The interrupt disable flag is set and the corresponding
    interrupt request bit is cleared.
    3. The interrupt jump destination address is read from the vector
    table into the program counter.
    I
    Notes on Use
    When the active edge of an external interrupt (INT
    0
    –INT
    4
    ) is set or
    when switching interrupt sources in the same vector address, the
    corresponding interrupt request bit may also be set. Therefore, please
    take following sequence:
    (1) Disable the external interrupt which is selected.
    (2) Change the active edge in interrupt edge selection register
    (3) Clear the set interrupt request bit to “0”.
    (4) Enable the external interrupt which is selected.
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