
38B5 Group User’s Manual
3-19
APPENDIX
3.3 Notes on use
3.3.4 Notes on FLD controller
G
Set a value of 03
16
or more to the Toff1 time set register.
G
When displaying in the gradation display mode, select the 16 timing mode by the timing number control
bit (bit 4 of FLDC mode register (address 0EF4
16
) = “0”).
3.3.5 Notes on A-D converter
(1)
Analog input pin
I
Make the signal source impedance for analog input low, or equip an analog input pin with an
external capacitor of 0.01
μ
F to 1
μ
F. Further, be sure to verify the operation of application
products on the user side.
G
Reason
An analog input pin includes the capacitor for analog voltage comparison. Accordingly, when
signals from signal source with high impedance are input to an analog input pin, charge and
discharge noise generates. This may cause the A-D conversion precision to be worse.
I
When the P6
4
/INT
4
/S
BUSY1
/AN
10
pin is selected as analog input pin, external interrupt function (INT
4
)
becomes invalid.
(2)
A-D converter power source pin
The AV
SS
pin is A-D converter power source pin. Regardless of using the A-D conversion function
or not, connect it as following :
AV
SS
: Connect to the V
SS
line
G
Reason
If the AV
SS
pin is opened, the microcomputer may have a failure because of noise or others.
(3)
Clock frequency during A-D conversion
The comparator consists of a capacity coupling, and a charge of the capacity will be lost if the clock
frequency is too low. Thus, make sure the following during an A-D conversion.
f(X
IN
) is 250 kHz or more
Use clock divided by main clock (f(X
IN
)) as internal system clock.
Do not execute the
STP
instruction and
WIT
instruction
3.3.6 Notes on PWM
G
For PWM
0
output, “L” level is output first.
G
After data is set to the PWM register (low-order) and the PWM register (high-order), PWM waveform
corresponding to new data is output from next repetitive cycle.
Fig. 3.3.5 PWM output
P
c
W
h
a
M
0
n
g
o
u
t
p
u
t
d
a
t
a
e
M
r
e
o
p
d
e
i
t
f
i
i
t
e
i
d
v
d
c
a
y
t
a
c
e
i
s
.
o
u
t
p
u
t
f
r
o
m
n
e
x
t
e
l