參數(shù)資料
型號: M38D24G4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 39/138頁
文件大小: 2880K
代理商: M38D24G4-XXXFP
Rev.3.02
Apr 10, 2008
Page 131 of 131
REJ03B0177-0302
38D2 Group
During CPU rewrite mode, set the system clock
φ 4.0 MHz or
less using the main clock division ratio selection bits (bits 6 and
7 of address 003B16).
2. Prohibited Instructions
The instructions which refer to the internal data of the flash
memory cannot be used during the CPU rewrite mode.
3. Interrupts
The interrupts cannot be used during the CPU rewrite mode
because they refer to the internal data of the flash memory.
4. Watchdog Timer
In case of the watchdog timer has been running already, the
internal reset generated by watchdog timer underflow does not
happen, because of watchdog timer is always clearing during
program or erase operation.
5. Reset
Reset is always valid. In case of CNVSS = “H” when reset is
released, boot mode is active. So the program starts from the
address contained in address FFFC16 and FFFD16 in boot ROM
area.
CNVSS Pin
The CNVSS pin determines the flash memory mode.
Connect the CNVSS pin the shortest possible to the GND pattern
which is supplied to the VSS pin of the microcomputer.
In addition connecting an approximately 5 k
Ω. resistor in series
to the GND could improve noise immunity. In this case as well as
the above mention, connect the pin the shortest possible to the
GND pattern which is supplied to the VSS pin of the
microcomputer.
Note. When the boot mode or the standard serial I/O mode is used, a
switch of the input level to the CNVSS pin is required.
Fig. 109 Wiring for CNVSS pin
The shortest
CNVSS
VSS
Approx. 5k
Ω
The shortest
(1)
Note 1: It shows the microcomputer’s pin.
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