參數(shù)資料
型號(hào)： M38D24G4FP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 69/136頁(yè)
文件大?。?/td> 2856K
代理商： M38D24G4FP
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Rev.3.02
Apr 10, 2008
Page 38 of 131
REJ03B0177-0302
38D2 Group
Fig. 29 Block diagram of timer Y
Timer Y
Timer Y is a 16-bit timer. The timer Y count source can be
selected by setting the timer Y mode register. XCIN can be
selected as the count source. When XCIN is selected as the count
source, counting can be performed regardless of XIN oscillation
or on-chip oscillator oscillation.
Four operating modes can be selected for timer Y by the timer Y
mode register. Also, the real time port can be controlled.
(1) Timer Mode
The timer Y count source can be selected by setting the timer Y
mode register.
(2) Period Measurement Mode
The interrupt request is generated at rising or falling edge of
CNTR1 pin input signal. Simultaneously, the value in timer Y
latch is reloaded in timer Y and timer Y continues counting.
Except for that, this mode operates just as in the timer mode.
The timer value just before the reloading at rising or falling of
CNTR1 pin input is retained until the timer Y is read once after
the reload.
The rising or falling timing of CNTR1 pin input is found by
CNTR1 interrupt. When using this mode, set the port sharing the
CNTR1 pin to input mode.
(3) Event Counter Mode
The timer counts signals input through the CNTR1 pin.
Except for that, this mode operates just as in the timer mode.
When using this mode, set the port sharing the CNTR1 pin to
input mode.
(4) Pulse Width HL Continuously Measurement Mode
The interrupt request is generated at both rising and falling edges
of CNTR1 pin input signal. Except for that, this mode operates
just as in the period measurement mode. When using this mode,
set the port sharing the CNTR1 pin to input mode.
(5) Real Time Port Control
When the real time port function is valid, data for the real time
port is output from ports P46 and P47 each time the timer Y
underflows.
(However, if the real time port control bits are changed from
“002” to “112” after both data for real time ports are set, data are
output independent of the timer Y operation.) When either or
both data for real time ports are changed while the real time port
function is valid, the changed data is output at the next underflow
of timer Y.
When switching the setting of the real time port control bits
between valid and invalid, write to the timer Y mode register in
byte units with the LDM or STA instruction so that both bits are
switched at the same time. Also, before using this function, set
the P46 and P47 port direction registers to output.
Data bus
Real time port
control bits
Real time port
control bits
Q D
Latch
Q D
Latch
P47 direction
register
P47 latch
P47 data for real time
port
P46 direction
register
P46 latch
P46 data for real time
port
“1”
Timer Y (low-order) latch (8) Timer Y (high-order) latch (8)
“0”
CNTR1 active
edge switch bit
“10”
P47/RTP1/AN7
P46/RTP0/AN6
CNTR1
Falling edge detection
Period measurement
mode
Timer Y
interrupt request
Pulse width HL continuous
measurement mode
Timer Y operating
mode bits
CNTR1
interrupt request
Rising edge detection
Count source selection bit
XcIN
“1”
φSOURCE
Real time port control bits
Timer Y mode register
write signal
Timer Y operating mode bits
“00”, “01”, “11”
“11”
“00”
“11”
“00”
“11”
“00”
“00”, “01”, “10”
“11”
“0”
Timer Y write control bit
Timer Y count
stop bit
“00”
“11”
Timer Y mode register
write signal
Real time port control bits
Timer Y (low-order)(8)
Timer Y (high-order)(8)
Frequency divider
Timer Y dividing frequency selection bit
2
Note: In frequency/2, frequency/4, or frequency/8 mode,
φSOURCE is the XIN input. In on-chip oscillator
mode,
φSOURCE is the on-chip oscillator frequency divided by 4. In low-speed mode, φSOURCE is
the sub-clock frequency.
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