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參數(shù)資料
| 型號： | M38D29FFHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 130/138頁 |
| 文件大?。?/td> | 2880K |
| 代理商： | M38D29FFHP |
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Rev.3.02
Apr 10, 2008
Page 89 of 131
REJ03B0177-0302
38D2 Group
NOTES ON USE
Processor Status Register
The contents of the processor status register (PS) after a reset are
undefined, except for the interrupt disable flag (I) which is “1”.
After a reset, initialize flags which affect program execution.
In particular, it is essential to initialize the index X mode (T) and
the decimal mode (D) flags because of their effect on
calculations. Initialize these flags at biginning of the program.
Interrupt
The contents of the interrupt request bits do not change
immediately after they have been written. After writing to an
interrupt request register, execute at least one instruction before
performing a BBC or BBS instruction.
Decimal Calculations
To calculate in decimal notation, set the decimal mode flag (D)
to “1”, then execute an ADC or SBC instruction. After
executing an ADC or SBC instruction, execute at least one
instruction before executing a SEC, CLC, or CLD instruction.
In decimal mode, the values of the negative (N), overflow (V),
and zero (Z) flags are invalid.
Timers
The division ratio is 1/(n+1) when the value n (0 to 255) is
written to the timer latch.
Multiplication and Division Instructions
The index mode (T) and the decimal mode (D) flags do not affect
the MUL and DIV instruction.
The execution of these instructions does not change the contents
of the processor status register.
Direction Registers
The values of the port direction registers cannot be read. This
means, it is impossible to use the LDA instruction, memory
operation instruction when the T flag is “1”, addressing mode
using direction register values as qualifiers, and bit test
instructions such as BBC and BBS. It is also impossible to use bit
operation instructions such as CLB and SEB, and read-modify-
write instructions to direction registers, including calculations
such as ROR. To set the direction registers, use instructions such
as LDM or STA.
Serial Interface
In clock synchronous serial I/O, if the receive side is using an
external clock and it is to output the SRDY signal, set the transmit
enable bit, the receive enable bit, and the SRDY output enable bit
to “1”.
Serial I/O continues to output the final bit from the TXD pin after
transmission is completed.
A/D Converter
The comparator is constructed linked to a capacitor. The
conversion accuracy may be low because the charge is lost if the
conversion speed is not enough. Accordingly, set f(XIN) to at
least 500kHz during A/D conversion in the XIN mode.
Also, do not execute the STP or WIT instruction during an A/D
conversion.
In the low-speed mode, since the A/D conversion is executed by
the on-chip oscillator, the minimum value of f(XIN) frequency is
not limited.
LCD Drive Control Circuit
Execution of the STP instruction sets the LCD enable bit (bit 3 of
the LCD mode register) and bits 0 to 5 and bit 7 of the LCD
power control register to “0” and the LCD panel turns off. To
make the LCD panel turn on after returning from the stop mode,
set these bits to “1”.
Instruction Execution Time
The instruction execution time is obtained by multiplying the
frequency of the internal clock
φ by the number of cycles needed
to execute an instruction.
Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and
may perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the power source voltage is less
than the recommended operating conditions and design a system
not to cause errors to the system by this unstable operation.
Handling of Power Source Pin
In order to avoid a latch-up occurrence, connect a capacitor
suitable for high frequencies as bypass capacitor between power
source pin (VCC pin) and GND pin (Vss pin), and between power
source pin (VCC pin) and analog power source pin (AVCC).
Besides, connect the capacitor to as close as possible. For bypass
capacitor which should not be located too far from the pins to be
connected, a ceramic capacitor of 0.1
μF is recommended.
LCD drive power supply
Power supply capacitor may be insufficient with the division
resistance for LCD power supply, and the characteristic of the
LCD panel. In this case, there is the method of connecting the
bypass capacitor about 0.1
0.33μF to VL1 VL3 pins. The
example of a strengthening measure of the LCD drive power
supply is shown below.
Fig. 85 Strengthening measure example of LCD drive
power supply
Connect by the shortest
possible wiring.
Connect the bypass capacitor
to the VL1
VL3 pins as short
as possible.
(Referential value:0.1
0.33 μF)
VL3
VL2
VL1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M38D29FFHP#U1 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38D29GFHP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38D29T2-RLFS-HP | 制造商:Renesas Electronics Corporation 功能描述: |
| M38D58G8FP#U0 | 功能描述:IC 740/38D5 MCU QZ-ROM 80QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M38D58G8HP#U0 | 功能描述:IC 740/38D5 MCU QZ-ROM 80LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
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