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| 型號(hào)： | M38D29GFFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 52/138頁(yè) |
| 文件大小： | 2880K |
| 代理商： | M38D29GFFP |
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Rev.3.02
Apr 10, 2008
Page 18 of 131
REJ03B0177-0302
38D2 Group
I/O PORTS
Direction Registers
The I/O ports P0
P6 have direction registers which determine
the input/output direction of each individual pin. Each bit in a
direction register corresponds to one pin, each pin can be set to
be input port or output port.
When “0” is written to the bit of the direction register, the
corresponding pin becomes an input pin. As for ports P0
P2,
when “1” is written to the bit of the direction register and the
segment output disable register, the corresponding pin becomes
an output pin. As for ports P3
P6, when “1” is written to the bit
of the direction register, the corresponding pin becomes an
output pin.
If data is read from a pin set to output, the value of the port latch
is read, not the value of the pin itself. However, when peripheral
output (RTP1, RTP0, TXOUT1, T4OUT, T3OUT, T2OUT/CKOUT,
OOUT0, and OOUT1) is selected, the output value is read. Pins set
to input are floating. If a pin set to input is written to, only the
port output latch is written to and the pin remains floating.
Pull-up Control
Each individual bit of ports P0
P2 can be pulled up with a
program by setting direction registers and segment output disable
registers 0 to 2 (addresses 0FF416 to 0FF616).
The pin is pulled up by setting “0” to the direction register and
“1” to the segment output disable register.
By setting the PULL register (addresses 0FF016), ports P3
P6
can control pull-up with a program.
However, the contents of PULL register do not affect ports
programmed as the output ports.
Fig. 11 Structure of ports P0 to P2
Fig. 12 Structure of PULL register and segment output
disable register
Segment output
disable register
Direction
register
Input port
No pull-up
Input port
Pull-up
Segment
output
Port output
“0”
“1”
Initial state
P00 pull-up
P01 pull-up
P02 pull-up
P03 pull-up
P04 pull-up
P05 pull-up
P06 pull-up
P07 pull-up
Segment output disable register 0
(SEG0 : address 0FF416)
b7
b0
Notes 1: The PULL register and segment output disable
register affect only ports programmed as the input
ports.
2: When the VL pin input selection bit (VLSEL) of the
LCD power control register (address 001416) is “1”,
settings of P26 and P27 are invalid.
PULL register
(PULL : address 0FF016)
b7
b0
P30
P33 pull-up
P34
P37 pull-up
P40
P43 pull-up
P44
P47 pull-up
P50
P53 pull-up
P54
P57 pull-up
P60
P62 pull-up
Not used (return “0” when read)
P10 pull-up
P11 pull-up
P12 pull-up
P13 pull-up
P14 pull-up
P15 pull-up
P16 pull-up
P17 pull-up
Segment output disable register 1
(SEG1 : address 0FF516)
b7
b0
P20 pull-up
P21 pull-up
P22 pull-up
P23 pull-up
P24 pull-up
P25 pull-up
P26 pull-up
P27 pull-up
Segment output disable register 2
(SEG2 : address 0FF616)
b7
b0
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
0 : No pull-up
1 : Pull-up
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