參數(shù)資料
型號: M40Z300AVMQ1F
廠商: 意法半導體
英文描述: 3V NVRAM Supervisor for Up to 8 LPSRAMs
中文描述: 3V的NVRAM中監(jiān)多達8個LPSRAMs
文件頁數(shù): 11/20頁
文件大?。?/td> 131K
代理商: M40Z300AVMQ1F
11/20
M40Z300AV
Table 6. DC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 3.0 to 3.6V (except where noted).
2. Outputs deselected.
3. For RST & BL pins (Open Drain).
4. Chip Enable outputs (E1
CON
- E4
CON
) can only sustain CMOS leakage currents in the battery back-up mode.
Higher leakage currents will reduce battery life.
5. Measured with V
OUT
and E1
CON
- E4
CON
open.
6. THS pin must ben tied to V
SS
.
Sym
Parameter
Test Condition
(1)
Min
Typ
Max
Unit
I
LI(2)
Input Leakage Current
0V
V
IN
V
CC
±1
μA
I
CC
Supply Current
Outputs open
2
4
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 0.3
V
V
OL
Output Low Voltage
I
OL
= 4.0mA
0.4
V
Output Low Voltage (open drain)
(3)
I
OL
= 10mA
0.4
V
V
OH
Output High Voltage
I
OH
= –2.0mA
2.4
V
V
OHB
V
OH
Battery Back-up
(4)
I
OUT2
= –1.0μA
2.0
2.9
3.6
V
I
OUT1
V
OUT
Current (Active)
V
OUT
> V
CC
–0.3
150
mA
V
OUT
> V
CC
–0.2
100
mA
I
OUT2
V
OUT
Current (Battery Back-up)
V
OUT
> V
BAT
–0.3
100
μA
I
CCDR
Data Retention Mode Current
(5)
100
nA
V
PFD
Power-fail Deselect Voltage (THS = V
SS
)
(6)
2.8
2.9
3.0
V
V
SO
Battery Back-up Switchover Voltage
2.7
2.8
2.9
V
V
BAT
Battery Voltage
2.0
2.9
3.6
V
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