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參數(shù)資料
| 型號： | M41T83SMY6F |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據(jù)恢復及定時提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO18 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-18 |
| 文件頁數(shù)： | 25/61頁 |
| 文件大小： | 983K |
| 代理商： | M41T83SMY6F |
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M41T82-M41T83
Clock operation
Doc ID 12578 Rev 12
The on-chip capacitance can be calculated as follows:
where ACS is the sign.
For example:
●
CLOAD (12h = x0000000) = 12.5 pF
●
CLOAD (12h =11001000) = 3.5 pF (sign is negative)
●
CLOAD (12h = 00100111) = 17.4 pF
With the analog calibration adjusted to its lowest value, the oscillator will see a minimum of
3.5 pF load capacitance as shown on the bottom row of Table 7.
Note:
These are typical values, and the total load capacitance seen by the crystal will include
approximately 1-2 pF of package and board capacitance in addition to the analog calibration
register value.
Any invalid value of analog calibration will result in the default capacitance of 25 pF.
The combination of analog and digital trimming can give up to –93 to +156 ppm of the total
adjustment.
Figure 18 represents a typical curve of clock ppm adjustment versus the analog calibration
value. This curve may vary with different crystals, so it is good practice to evaluate the
crystal to be used with an M41T8x device before establishing the adjustment values for the
application in question.
Figure 18.
Clock accuracy vs. on-chip load capacitance
[]pF
25
.
0
)
decimal
,
value
0
AC
:
6
AC
(
ACS
2
1
CLOAD
+
=
ai13906
DECREASING LOAD CAP.
-20.0
0.0
20.0
40.0
60.0
80.0
100.0
-5.0
-18.0 -15.0
-10.0
0.0
5.0
9.75
Analog Calibration
Value, AC,
register 0x12
PPM
A
DJ
USTM
ENT
OFFSET TO
CXI, CXO (pF)
NET EQUIV. LOAD
CAP., C LOAD, (pF)
10
3.5
5.0
7.5
12.5
15
17.4
0xC8 0xBC
0xA8
0x94
0x00
0x14
0x27
INCREASING LOAD CAP.
SLOWER
FASTER
XO
XI
Crystal
Oscillator
CXO
CXI
CLOAD =
CXI + CXO
CXI * CXO
On-Chip
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