參數(shù)資料
型號(hào)： M464S0924DTS-C7A
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
中文描述： 8Mx64 SDRAM內(nèi)存的SODIMM在8M × 16位，4Banks，4K的刷新，3.3V的同步DRAM的社民黨
文件頁數(shù)： 8/11頁
文件大?。?/td> 85K
代理商： M464S0924DTS-C7A
M464S0924DTS
PC133/PC100 SODIMM
Rev. 0.1 Sept. 2001
SIMPLIFIED TRUTH TABLE
(V=Valid, X=Don
′
t care, H=Logic high, L=Logic low)
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
BA
0,1
A
10
/AP
A
11,
A
9
~ A
0
Note
Register
Mode register set
H
X
L
L
L
L
X
OP code
1,2
Refresh
Auto refresh
H
H
L
L
L
H
X
X
3
Self
refresh
Entry
L
3
Exit
L
H
L
H
H
H
X
X
3
H
X
X
X
3
Bank active & row addr.
H
X
L
L
H
H
X
V
Row address
Read &
column address
Auto precharge disable
H
X
L
H
L
H
X
V
L
Column
address
(A
0
~ A
8
)
4
Auto precharge enable
H
4,5
Write &
column address
Auto precharge disable
H
X
L
H
L
L
X
V
L
Column
address
(A
0
~ A
8
)
4
Auto precharge enable
H
4,5
Burst stop
H
X
L
H
H
L
X
X
6
Precharge
Bank selection
H
X
L
L
H
L
X
V
L
X
All banks
X
H
Clock suspend or
active power down
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
X
X
X
Precharge power down mode
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
V
V
V
DQM
H
V
X
7
No operation command
H
X
H
X
X
X
X
X
L
H
H
H
1. OP Code : Operand code
A
0
~ A
11
& BA
0
~ BA
1
: Program keys. (@ MRS)
2. MRS can be issued only at all banks precharge state.
A new command can be issued after 2 clock cycles of MRS.
3. Auto refresh functions are as same as CBR refresh of DRAM.
The automatical precharge without row precharge command is meant by "Auto".
Auto/self refresh can be issued only at all banks precharge state.
4. BA
0
~ BA
1
: Bank select addresses.
If both BA
0
and BA
1
are "Low" at read, write, row active and precharge, bank A is selected.
If both BA
0
is "Low" and BA
1
is "High" at read, write, row active and precharge, bank B is selected.
If both BA
0
is "High" and BA
1
is "Low" at read, write, row active and precharge, bank C is selected.
If both BA
0
and BA
1
are "High" at read, write, row active and precharge, bank D is selected.
If A
10
/AP is "High" at row precharge, BA
0
and BA
1
is ignored and all banks are selected.
5. During burst read or write with auto precharge, new read/write command can not be issued.
Another bank read/write command can be issued after the end of burst.
New row active of the associated bank can be issued at t
RP
after the end of burst.
6. Burst stop command is valid at every burst length.
7. DQM sampled at positive going edge of a CLK and masks the data-in at the very CLK (Write DQM latency is 0),
but makes Hi-Z state the data-out of 2 CLK cycles after. (Read DQM latency is 2)
Notes :
X
相關(guān)PDF資料
PDF描述
M464S0924DTS-C7C 8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S1654BT1 16Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD
M464S1654ETS-C7A SDRAM Unbuffered SODIMM
M464S1654ETS SDRAM Unbuffered SODIMM
M464S1724FTS-C(L)7A 144pin Unbuffered SODIMM based on 128Mb F-die 64-bit Non ECC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M464S0924DTS-C7C 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S0924DTS-L1H 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S0924DTS-L1L 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S0924DTS-L7A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S0924DTS-L7C 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*