參數(shù)資料
型號(hào)： M48T02-200PC1
廠商： 意法半導(dǎo)體
英文描述： 16 Kbit 2Kb x8 TIMEKEEPER[ SRAM
中文描述： 16千位2KB的x8計(jì)時(shí)器[靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù)： 2/15頁(yè)
文件大?。?/td> 94K
代理商： M48T02-200PC1
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
0 to 70
°
C
T
STG
Storage Temperature (V
CC
Off, Oscillator Off)
–40 to 85
°
C
T
SLD(2)
Lead Solder Temperature for 10 seconds
260
°
C
V
IO
Input or Output Voltages
–0.3to 7
V
V
CC
Supply Voltage
–0.3to 7
V
I
O
Output Current
20
mA
P
D
Power Dissipation
1
W
Notes:
1. Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicatedin the operational
section of this specification is not implied.Exposure to the absolute maximum rating conditions for extended periods of time may
affect reliability.
2. Soldering temperature not to exceed 260
°
C for 10 seconds (total thermal budget not to exceed 150
°
C for longer than 30 seconds).
CAUTION:
Negativeundershoots below –0.3volts are not allowed on any pin while in the Battery Back-up mode.
Table3. OperatingModes
Table2. Absolute MaximumRatings
(1)
Mode
V
CC
E
G
W
DQ0-DQ7
Power
Deselect
4.75V to 5.5V
or
4.5V to 5.5V
V
IH
X
X
High Z
Standby
Write
V
IL
X
V
IL
D
IN
Active
Read
V
IL
V
IL
V
IH
D
OUT
Active
Read
V
IL
V
IH
V
IH
High Z
Active
Deselect
V
SO
to V
PFD
(min)
X
X
X
High Z
CMOS Standby
Deselect
≤
V
SO
X
X
X
High Z
Battery Back-up Mode
Notes
: X = V
IH
or V
IL
; V
SO
= Battery Back-up Switchover Voltage.
A1
A0
DQ0
DQ1
DQ2
VSS
A7
A6
A5
A4
A3
A2
A10
E
A8
A9
W
G
DQ7
DQ6
DQ5
DQ4
DQ3
VCC
AI01028
M48T02
M48T12
8
9
10
11
12
1
2
3
4
5
6
7
16
15
14
13
24
23
22
21
20
19
18
17
Figure 2. DIPPin Connections
The M48T02/12 button cell has sufficient capacity
andstoragelife tomaintaindataandclockfunction-
ality for an accumulatedtime period of at least 10
years in the absenceof power over the operating
temperaturerange.
The M48T02/12 is a non-volatile pin and function
equivalentto any JEDEC standard2Kb x8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
AsFigure3shows,thestaticmemoryarrayandthe
quartzcontrolledclockoscillatorof the M48T02/12
areintegratedon one silicon chip. The two circuits
are interconnected at the upper eight memory lo-
cations to provide user accessible BYTEWIDE
clockinformationin thebyteswithaddresses7F8h-
7FFh.The clocklocationscontainthe year,month,
date,day,hour,minute,andsecondin24hourBCD
format. Correctionsfor 28,29 (leap year), 30, and
31 day months are made automatically.
DESCRIPTION
(cont’d)
2/15
M48T02, M48T12
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