參數(shù)資料
型號: M48T212V-70MH1
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO44
封裝: SNAPHAT, PLASTIC, SO-44
文件頁數(shù): 4/23頁
文件大?。?/td> 150K
代理商: M48T212V-70MH1
M48T212Y, M48T212V
12/23
If the SRAM includes a second chip enable pin
(E2), this pin should be tied to VOUT.
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0V. Manufacturers gen-
erally specify a typical condition for room temper-
ature along with a worst case condition (generally
at elevated temperatures). The system level re-
quirements will determine the choice of which val-
ue to use.
The data retention current value of the SRAMs can
then be added to the IBAT value of the M48T212Y/
V to determine the total current requirements for
data retention. The available battery capacity for
the SNAPHAT of your choice can then be divided
by this current to determine the amount of data re-
tention available (see Table 15).
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
Figure 9. Alarm Interrupt Reset Waveforms
AI03021
A0-A3
ACTIVE FLAG BIT
ADDRESS 0h
IRQ/FT
HIGH-Z
1h
Fh
Table 12. Alarm Repeat Modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
Once per Second
1
0
Once per Minute
1
0
Once per Hour
1
0
Once per Day
1
0
Once per Month
0
Once per Year
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