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參數(shù)資料
| 型號： | M48T212V-70MH6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| 封裝： | SNAPHAT, PLASTIC, SO-44 |
| 文件頁數(shù)： | 23/23頁 |
| 文件大?。?/td> | 150K |
| 代理商： | M48T212V-70MH6 |
9/23
M48T212Y, M48T212V
Figure 7. Read Cycle Timing: RTC Control Signals
AI02640
W
DQ7-DQ0
G
DATA OUT
VALID
ADDRESS
tAVAV
E
tELQV
tAVAV
READ
WRITE
DATA IN
VALID
DATA OUT
VALID
tAVQV
tWHAX
tAVWL
tELQX
tGLQV
tGHQZ
tWLWH
tAXQX
tGLQX
Table 10. Read Mode Characteristics
(TA = 0 to 70°C)
Note: 1. CL = 5pF
Symbol
Parameter
M48T212Y
M48T212V
Unit
-70
-85
Min
Max
Min
Max
tAVAV
Read Cycle Time
70
85
ns
tAVQV
Address Valid to Output Valid
70
85
ns
tELQV
Chip Enable Low to Output Valid
70
85
ns
tGLQV
Output Enable Low to Output Valid
25
35
ns
tELQX
(1)
Chip Enable Low to Output Transition
5
ns
tGLQX
(1)
Output Enable Low to Output Transition
0
ns
tEHQZ
(1)
Chip Enable High to Output Hi-Z
20
25
ns
tGHQZ
(1)
Output Enable High to Output Hi-Z
20
25
ns
tAXQX
Address Transition to Output Transition
5
ns
READ MODE
The M48T212Y/V executes a read cycle whenev-
er W (Write Enable) is high and E (Chip Enable) is
low. The unique address specified by the address
inputs (A3-A0) defines which one of the on-chip
TIMEKEEPER registers is to be accessed. When
the address presented to the M48T212Y/V is in
the range of 0h-Fh, one of the on-board TIME-
KEEPER registers is accessed and valid data will
be available to the eight data output drivers within
tAVQV after the address input signal is stable, pro-
viding that the E and G access times are also sat-
isfied.If they are not, then data access must be
measured from the latter occurring signal (E or G)
and the limiting parameter is either tELQV for E or
tGLQV for G rather than the address access time.
When EX input is low, an external SRAM location
will be selected.
Note: Care should be taken to avoid taking both E
and EX low simultaneously to avoid bus conten-
tion.
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PDF描述 |
|---|---|
| M48T212V-70MH1TR | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| M48T212V-85MH6 | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| M48T212Y-70MH1TR | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| M48T212Y-70MH1F | REAL TIME CLOCK, PDSO44 |
| M48T212Y-70MH1 | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T212V-70MH6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER CONTROLLER Supervisor |
| M48T212V-70MH6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER CONTROLLER Supervisor |
| M48T212V-70MH6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER[ CONTROLLER |
| M48T212V-85MH1 | 功能描述:監(jiān)控電路 SRAM TK 16X8 85ns RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| M48T212V-85MH1E | 功能描述:監(jiān)控電路 SRAM TK 16X8 85ns RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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