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參數(shù)資料
| 型號： | M48T212V-85MH1E |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | REAL TIME CLOCK, PDSO44 |
| 封裝： | 0.330 INCH, ROHS COMPLIANT, PLASTIC, SOH-44 |
| 文件頁數(shù)： | 8/35頁 |
| 文件大小： | 348K |
| 代理商： | M48T212V-85MH1E |
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Clock operation
M48T212V
3
Clock operation
3.1
TIMEKEEPER registers
The M48T212V offers 16 internal registers which contain TIMEKEEPER, Alarm,
Watchdog, Flag, and Control data. These registers are memory locations which contain
external (user accessible) and internal copies of the data (usually referred to as BiPORT
TIMEKEEPER cells).
The external copies are independent of internal functions except that they are updated
periodically by the simultaneous transfer of the incremented internal copy. TIMEKEEPER
and Alarm Registers store data in BCD. Control, Watchdog and Flags Registers store data
in Binary Format.
3.2
Reading the clock
Updates to the TIMEKEEPER registers should be halted before clock data is read to prevent
reading data in transition. The BiPORT TIMEKEEPER cells in the RAM array are only data
registers and not the actual clock counters, so updating the registers can be halted without
disturbing the clock itself.
Updating is halted when a '1' is written to the READ Bit, D6 in the Control Register (8h). As
long as a '1' remains in that position, updating is halted. After a halt is issued, the registers
reflect the count; that is, the day, date, and time that were current at the moment the halt
command was issued.
All of the TIMEKEEPER registers are updated simultaneously. A halt will not interrupt an
update in progress. Updating occurs 1 second after the READ Bit is reset to a '0.'
3.3
Setting the clock
Bit D7 of the Control Register (8h) is the WRITE Bit. Setting the WRITE Bit to a '1,' like the
READ Bit, halts updates to the TIMEKEEPER registers. The user can then load them with
the correct day, date, and time data in 24 hour BCD format (see Table 7 on page 18).
Resetting the WRITE Bit to a '0' then transfers the values of all time registers (Fh-9h, 1h) to
the actual TIMEKEEPER counters and allows normal operation to resume. After the WRITE
Bit is reset, the next clock update will occur one second later.
Note:
Upon power-up following a power failure, the READ Bit will automatically be set to a '1.' This
will prevent the clock from updating the TIMEKEEPER registers, and will allow the user to
read the exact time of the power-down event.
Resetting the READ Bit to a '0' will allow the clock to update these registers with the current
time. The WRITE Bit will be reset to a '0' upon power-up.
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T212V-85MH1F | 功能描述:監(jiān)控電路 SRAM TK 16X8 85ns RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| M48T212V-85MH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER[ CONTROLLER |
| M48T212V-85MH6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER[ CONTROLLER |
| M48T212V-85MH6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER CONTROLLER Supervisor |
| M48T212V-85MH6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER CONTROLLER Supervisor |
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