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參數(shù)資料
| 型號(hào)： | M48T35AVSH |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| 中文描述： | 256千位的32KB的SRAM x8計(jì)時(shí)器 |
| 文件頁(yè)數(shù)： | 9/19頁(yè) |
| 文件大?。?/td> | 148K |
| 代理商： | M48T35AVSH |
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M48T35AY, M48T35AV
Table 10. Write Mode AC Characteristics
(T
A
= 0 to 70 °C or –40 to 85 °C; V
CC
= 4.5V to 5.5V or 3.0V to 3.6V)
Note: 1. C
L
= 5pF.
2. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Symbol
Parameter
M48T35AY
M48T35AV
Unit
-70
-100
Min
Max
Min
Max
t
AVAV
Write Cycle Time
70
100
ns
t
AVWL
Address Valid to Write Enable Low
0
0
ns
t
AVEL
Address Valid to Chip Enable Low
0
0
ns
t
WLWH
Write Enable Pulse Width
50
80
ns
t
ELEH
Chip Enable Low to Chip Enable High
55
80
ns
t
WHAX
Write Enable High to Address Transition
0
10
ns
t
EHAX
Chip Enable High to Address Transition
0
10
ns
t
DVWH
Input Valid to Write Enable High
30
50
ns
t
DVEH
Input Valid to Chip Enable High
30
50
ns
t
WHDX
Write Enable High to Input Transition
5
5
ns
t
EHDX
Chip Enable High to Input Transition
5
5
ns
t
WLQZ
(1, 2)
Write Enable Low to Output Hi-Z
25
50
ns
t
AVWH
Address Valid to Write Enable High
60
80
ns
t
AVEH
Address Valid to Chip Enable High
60
80
ns
t
WHQX
(1, 2)
Write Enable High to Output Transition
5
10
ns
Setting the Clock
Bit D7 of the Control Register 7FF8h is the WRITE
bit. Setting the WRITE bit to a '1', like the READ
bit, halts updates to the TIMEKEEPER registers.
The user can then load them with the correct day,
date, and time data in 24 hour BCD format (see
Table 11). Resetting the WRITE bit to a '0' then
transfers the values of all time registers 7FF9h-
7FFFh to the actual TIMEKEEPER counters and
allows normal operation to resume. The FT bit and
the bits marked as '0' in Table 11 must be written
to '0' to allow for normal TIMEKEEPER and RAM
operation. After the WRITE bit is reset, the next
clock update will occur within one second.
See the Application Note AN923 "TIMEKEEPER
rolling into the 21st century" on the for information
on Century Rollover.
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
time on the shelf, the oscillator can be turned off to
minimize current drain on the battery. The STOP
bit is the MSB of the seconds register. Setting it to
a '1' stops the oscillator. The M48T35AY/35AV is
shipped from STMicroelectronics with the STOP
bit set to a '1'. When reset to a '0', the M48T35AY/
35AV oscillator starts within 1 second.
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| M48T35-70MH6TR | 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T35AY | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 or 3.3V, 256 Kbit (32 Kb x8) TIMEKEEPER㈢ SRAM |
| M48T35AY_04 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 or 3.3V, 256 Kbit (32 Kb x8) TIMEKEEPER㈢ SRAM |
| M48T35AY-10MH1 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T35AY-10MH1TR | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T35AY-10MH6 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
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