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參數(shù)資料
| 型號(hào)： | M48T37VSH |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| 中文描述： | 3.3 - 5V的256千位的32KB的SRAM x8計(jì)時(shí)器 |
| 文件頁(yè)數(shù)： | 14/20頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | M48T37VSH |
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M48T37Y, M48T37V
14/20
WATCHDOG TIMER
The watchdog timer can be used to detect an out-
of-control microprocessor. The user programs the
watchdog timer by setting the desired amount of
time-out into the eight bit Watchdog Register, ad-
dress 7FF7h. The five bits (BMB4-BMB0) store a
binary multiplier andthe two lower order bits (RB1-
RB0) select the resolution, where 00 = 1/16 sec-
ond, 01 = 1/4second, 10 = 1 second, and 11 = 4
seconds. The amount of time-out is then deter-
mined to be the multiplication of the five bit multi-
plier value with the resolution. (For example:
writing 00001110 in the Watchdog Register = 3x1
or 3 seconds).
Note
: Accuracy of timer is within
±
the selected
resolution.
If theprocessor does not reset the timer within the
specified period, the M48T37Y/37V sets the
Watchdog Flag (WDF)and generates a watchdog
interrupt or a microprocessor reset. WDF is reset
by reading the Flags Register (Address 1FF0h).
The most significant bit of the Watchdog Register
is the Watchdog Steering Bit.When setto a ‘0’, the
watchdog will activatethe IRQ/FT pin when timed-
out. When WDS is set to a ‘1’, the watchdog will
output a negative pulse on the RST pin for a dura-
tion of 40ms to 200ms. The Watchdog registerand
the FT bit will reset to a ’0’ at the end of a Watch-
dog time-out when the WDS bit is set to a ‘1’.
The watchdog timer resets when themicroproces-
sor performs a re-write of the Watchdog Register
or an edge transition, (low to high / high to low) on
the WDI pin occurs. The time-out period then
starts over.
The watchdog timer is disabled by writing a value
of 00000000to the eight bits in theWatchdog Reg-
ister. Should the watchdog timertime out, a value
of 00h needs to be written to theWatchdog Regis-
ter in order to clear the IRQ/FT pin.
The watchdog function is automatically disabled
upon power-down and the Watchdog Register is
cleared. If the watchdog function is set to output to
the IRQ/FT pin and the frequency test function is
activated, the watchdog or alarm function prevails
and the frequency testfunction is denied. The WDI
pin should be connected to V
SS
if not used.
Figure 12. Back-up Mode Alarm Waveforms
AI03254B
VCC
VPFD(max)
VPFD(min)
IRQ/FT
tREC
ABE, AFE bit in Interrupt Register
AF bit in Flags Register
HIGH-Z
VSO
HIGH-Z
Table 12. Alarm Repeat Mode
RPT4
RPT3
RPT2
RPT1
Alarm Activated
1
1
1
1
Once per Second
1
1
1
0
Once per Minute
1
1
0
0
Once per Hour
1
0
0
0
Once per Day
0
0
0
0
Once per Month
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48T37YMH | TRANS PREBIASED DUAL NPN SOT363 |
| M48T37Y-70MH6TR | TRANS PREBIASED DUAL PNP SOT-363 |
| M48T37Y-70MH6 | TRANS PREBIAS DUAL COMP SOT-563 |
| M48T37Y-70MH1TR | TRANS PREBIASED DUAL COMP SOT363 |
| M48T37Y-10MH6TR | TRANS PREBIASED DUAL COMP SOT363 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T37Y | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37Y_10 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 256 Kbit (32 Kbit x 8) TIMEKEEPER?? SRAM |
| M48T37Y-10MH1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37Y-10MH1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37Y-10MH1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
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