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參數(shù)資料
| 型號： | M48Z128YSH |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:Solid; Jacket Color:Green; Approval Bodies:UL, CSA; Approval Categories:UL AWM Style 1061; CSA AWM; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes |
| 中文描述： | 1兆位的SRAM 128KB的x8 ZEROPOWER |
| 文件頁數(shù)： | 9/17頁 |
| 文件大?。?/td> | 106K |
| 代理商： | M48Z128YSH |
9/17
M48Z128, M48Z128Y
POWER SUPPLY DECOUPLING
and UNDERSHOOT PROTECTION
I
CC
transients, including those produced by output
switching, can produce voltage fluctuations, re-
sulting in spikes on the V
CC
bus. These transients
can be reduced if capacitors are used to store en-
ergy, which stabilizes the V
CC
bus. The energy
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1
μ
F (as shown in Figure
9) is recommended in order to provide the needed
filtering.
In addition to transients that are caused by normal
SRAM operation,power cycling cangenerate neg-
ative voltage spikes on V
CC
that drive it to values
below V
SS
by as much as one Volt. These nega-
tive spikescan cause data corruptionin the SRAM
while in battery backup mode. To protect from
these voltage spikes, it is recommended to con-
nect a schottky diode from V
CC
to V
SS
(cathode
connected to V
CC
, anode to V
SS
). Schottky diode
1N5817 is recommended for through hole and
MBRS120T3 is recommended for surface mount.
Figure 9. Supply Voltage Protection
AI02169
VCC
0.1
μ
F
DEVICE
VCC
VSS
Table 10. Write Mode AC Characteristics
(T
A
= 0 to 70
°
C; V
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
Note: 1. C
L
= 5pF.
2. If E goes low simultaneously with W going low after W going low, the outputs remain in the high impedance state.
Symbol
Parameter
M48Z128/M48Z128Y
Unit
-70
-85
-120
Min
Max
Min
Max
Min
Max
t
AVAV
Write Cycle Time
70
85
120
ns
t
AVWL
Address Valid to Write Enable Low
0
0
0
ns
t
AVEL
Address Valid to Chip Enable Low
0
0
0
ns
t
WLWH
Write Enable Pulse Width
55
65
85
ns
t
ELEH
Chip Enable Low to Chip Enable High
55
75
100
ns
t
WHAX
Write Enable High to Address Transition
5
5
5
ns
t
EHAX
Chip Enable High to Address Transition
15
15
15
ns
t
DVWH
Input Valid to Write Enable High
30
35
45
ns
t
DVEH
Input Valid to Chip Enable High
30
35
45
ns
t
WHDX
Write Enable High to Input Transition
0
0
0
ns
t
EHDX
Chip Enable High to Input Transition
10
10
10
ns
t
WLQZ(1, 2)
Write Enable Low to Output Hi-Z
25
30
40
ns
t
AVWH
Address Valid to Write Enable High
65
75
100
ns
t
AVEH
Address Valid to Chip Enable High
65
75
100
ns
t
WHQX(1, 2)
Write Enable High to Output Transition
5
5
5
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48Z128Y-85CS1 | PADLOCK STN W/ 5 STEEL PADLOCKS |
| M48Z128YCS | 1 Mbit 128Kb x8 ZEROPOWER SRAM |
| M48Z128Y-70CS1 | 1 Mbit 128Kb x8 ZEROPOWER SRAM |
| M48Z128Y-120PM1 | 1 Mbit 128Kb x8 ZEROPOWER SRAM |
| M48Z128Y-70PM1 | 1 Mbit 128Kb x8 ZEROPOWER SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48Z129V | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V or 3.3 V, 1 Mbit (128 Kb x 8) ZEROPOWER? SRAM |
| M48Z129V-70PM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V OR 3.3V, 1 Mbit (128 Kb x 8) ZEROPOWER SRAM |
| M48Z129V-70PM1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V or 3.3 V, 1 Mbit (128 Kb x 8) ZEROPOWER? SRAM |
| M48Z129V-70PMTR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V OR 3.3V, 1 Mbit (128 Kb x 8) ZEROPOWER SRAM |
| M48Z129V-85PM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V OR 3.3V, 1 Mbit (128 Kb x 8) ZEROPOWER SRAM |
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