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參數(shù)資料
| 型號(hào)： | M48Z30Y-85PM1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | CMOS 32K x 8 ZEROPOWER SRAM |
| 中文描述： | 的CMOS 32K的× 8 ZEROPOWER的SRAM |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 100K |
| 代理商： | M48Z30Y-85PM1 |
specified by the 15 Address Inputs defines which
one of the 32,768 bytes of data is to be accessed.
Valid data will be available at the Data I/O pins
within t
AVQV
(Address Access Time) after the last
addressinput signal is stable, providing that theE
and G (OutputEnable) access times are also sat-
isfied.IftheEandGaccess timesarenotmet,valid
data will be availableafter the later of Chip Enable
AccessTime(t
ELQV
) orOutputEnableAccessTime
(t
GLQV
).
The state of the eight three-stateData I/O signals
iscontrolledbyEand G. Iftheoutputsareactivated
before t
AVQV
, the data lines will be driven to an
indeterminate state until t
AVQV
. If the Address In-
putsarechangedwhile EandGremain low, output
data will remain valid for t
AXQX
(Output Data Hold
Time) but will go indeterminate until the next Ad-
dressAccess.
WRITE MODE
TheM48Z30/30Yis inthe Write ModewheneverW
and E are active.The start of a write is referenced
from the latter occurring falling edge of W or E.
Figure 4. AC Testing Load Circuit
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
≤
5ns
0 to 3V
1.5V
AC MEASUREMENT CONDITIONS
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Figure3. Block Diagram
3/12
M48Z30, M48Z30Y
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48Z30Y-100PM1 | CMOS 32K x 8 ZEROPOWER SRAM |
| M48Z30 | CMOS 32K x 8 ZEROPOWER SRAM |
| M48Z30-100PM1 | CMOS 32K x 8 ZEROPOWER SRAM |
| M48Z30-85PM1 | CMOS 32K x 8 ZEROPOWER SRAM |
| M48Z30PM | CMOS 32K x 8 ZEROPOWER SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48Z30YPM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:CMOS 32K x 8 ZEROPOWER SRAM |
| M48Z32V | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V, 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM |
| M48Z32V_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V, 256Kbit (32Kbit x 8) ZEROPOWER SRAM |
| M48Z32V-35MT1 | 功能描述:NVRAM 256K (32Kx8) 35ns RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| M48Z32V-35MT1E | 功能描述:NVRAM 256K (32Kx8) 35ns RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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