參數(shù)資料
型號: M48Z32V-35MT6
廠商: 意法半導(dǎo)體
英文描述: 3.3V, 256 Kbit 32 Kbit x 8 ZEROPOWER SRAM
中文描述: 3.3伏,256千位32千位× 8 ZEROPOWER的SRAM
文件頁數(shù): 12/16頁
文件大?。?/td> 103K
代理商: M48Z32V-35MT6
M48Z32V
12/16
Table 10. Power Down/Up Trip Points DC Characteristics
Note: 1. All voltages referenced to V
SS
.
2. Valid for Ambient Operating Temperature: T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 3.0 to 3.6V (except where noted).
V
CC
Noise And Negative Going Transients
I
CC
transients, including those produced by output
switching, can produce voltage fluctuations, re-
sulting in spikes on the V
CC
bus. These transients
can be reduced if capacitors are used to store en-
ergy which stabilizes the V
CC
bus. The energy
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1μF (see Figure 10) is
recommended in order to provide the needed fil-
tering.
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on V
CC
that drive it to values
below V
SS
by as much as one volt. These negative
spikes can cause data corruption in the SRAM
while in battery backup mode. To protect from
these voltage spikes, ST recommends connecting
a schottky diode from V
CC
to V
SS
(cathode con-
nected to V
CC
, anode to V
SS
). (Schottky diode
1N5817 is recommended for through hole and
MBRS120T3 is recommended for surface mount).
Figure 10. Supply Voltage Protection
Symbol
Parameter
(1,2)
Min
Typ
Max
Unit
V
PFD
Power-fail Deselect Voltage
2.7
2.85
3.0
V
V
SO
Battery Back-up Switchover Voltage
V
PFD
– 100mV
V
AI02169
VCC
0.1
μ
F
DEVICE
VCC
VSS
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