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參數(shù)資料
| 型號(hào)： | M48Z58Y-70MH6TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
| 中文描述： | 64千位的8kB × 8 ZEROPOWER的SRAM |
| 文件頁數(shù)： | 9/17頁 |
| 文件大?。?/td> | 133K |
| 代理商： | M48Z58Y-70MH6TR |
DATA RETENTION MODE
With valid V
CC
applied, the M48Z58/58Y operates
as a conventional BYTEWIDE
static RAM.
Should the supply voltage decay, the RAM will
automatically power-fail deselect, write protecting
itself when V
CC
falls within the V
PFD
(max),
V
PFD
(min) window. All outputs become high imped-
ance, and all inputs are treated as "don’t care."
Note:
A power failure during a write cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM’s
content. At voltages below V
PFD
(min), the user can
be assured the memory will be in a write protected
state, provided the V
CC
fall time is not less than t
F
.
The M48Z58/58Y may respond to transient noise
spikes on V
CC
that reach into the deselect window
during the time the device is sampling V
CC
. There-
fore, decoupling of the power supply lines is rec-
ommended.
When V
CC
drops below V
SO
, the control circuit
switches power to the internal battery which pre-
serves data. The internal button cell will maintain
data in the M48Z58/58Y for an accumulated period
of at least 10 years when V
CC
is less than V
SO
.
As system power returns and V
CC
rises above V
SO
,
the battery is disconnected, and the power supply
is switched to external V
CC
. Write protection con-
tinues until V
CC
reaches V
PFD
(min) plus t
REC
(min).
Normal RAM operation can resume t
REC
after V
CC
exceeds V
PFD
(max).
For more information on Battery Storage Life refer
to the Application Note AN1012.
POWER SUPPLY DECOUPLING and UNDER-
SHOOT PROTECTION
I
CC
transients, including those produced by output
switching, can produce voltage fluctuations, result-
ing in spikes on the V
CC
bus. These transients can
be reduced if capacitors are used to store energy,
which stabilizes the V
CC
bus. The energy stored in
the bypass capacitors will be released as low going
spikes are generated or energy will be absorbed
when overshoots occur. A ceramic bypass capaci-
tor value of 0.1
μ
F (as shown in Figure 9) is recom-
mended in order to provide the needed filtering.
In addition to transients that are caused by normal
SRAM operation, power cycling can generate
negative voltage spikes on V
CC
that drive it to
values below V
SS
by as much as one Volt. These
negative spikes can cause data corruption in the
SRAM while in battery backup mode. To protect
from these voltage spikes, it is recommeded to
connect a schottky diode from V
CC
to V
SS
(cathode
connected to V
CC
, anode to V
SS
). Schottky diode
1N5817 is recommended for through hole and
MBRS120T3 is recommended for surface mount.
AI02169
VCC
0.1
μ
F
DEVICE
VCC
VSS
Figure 9. Supply Voltage Protection
9/17
M48Z58, M48Z58Y
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48Z58Y-70PC1 | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
| M48Z58Y-70PC1TR | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
| M48Z58Y-70PC6 | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
| M48Z58Y-70PC6TR | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
| M48Z58YMH | 64 Kbit 8Kb x 8 ZEROPOWER SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48Z58Y-70PC1 | 功能描述:NVRAM 64K (8Kx8) 70ns RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| M48Z58Y-70PC1 | 制造商:STMicroelectronics 功能描述:ZEROPOWER SRAM 64K 48Z58 DIP28 |
| M48Z58Y-70PC1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V, 64Kbit (8Kbit x 8) ZEROPOWER SRAM |
| M48Z58Y-70PC1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V, 64Kbit (8Kbit x 8) ZEROPOWER SRAM |
| M48Z58Y-70PC1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 ZEROPOWER SRAM |
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