參數(shù)資料
型號: M48Z58Y-70PC1TR
廠商: 意法半導(dǎo)體
英文描述: 64 Kbit 8Kb x 8 ZEROPOWER SRAM
中文描述: 64千位的8kB × 8 ZEROPOWER的SRAM
文件頁數(shù): 5/17頁
文件大?。?/td> 133K
代理商: M48Z58Y-70PC1TR
Symbol
Parameter
Min
Max
Unit
t
PD
E or W at V
IH
before Power Down
0
μ
s
t
F (1)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300
μ
s
t
FB (2)
V
PFD
(min) to V
SS
V
CC
Fall Time
10
μ
s
t
R
V
PFD
(min) to V
PFD
(max) V
CC
Rise Time
10
μ
s
t
RB
V
SS
to V
PFD
(min) V
CC
Rise Time
1
μ
s
t
REC (3)
V
PFD
(max) to Inputs Recognized
40
200
ms
Notes
: 1. V
PFD
(max) to V
PFD
(min) fall time of less than t
F
may result in deselection/write protection not occurring until 200
μ
s after
V
CC
passes V
PFD
(min).
2. V
PFD
(min) to V
fall time of less than t
may cause corruption of RAM data.
3. t
REC
(min) = 20ms for industrial temperature grade 6 device.
Table 8. Power Down/Up Mode AC Characteristics
(T
A
= 0 to 70
°
C or –40 to 85
°
C)
AI01168C
VCC
VPFD (max)
INPUTS
(PER CONTROL INPUT)
OUTPUTS
DON'T CARE
HIGH-Z
tF
tFB
tR
tPD
tRB
tDR
VALID
VALID
(PER CONTROL INPUT)
RECOGNIZED
RECOGNIZED
VPFD (min)
VSO
tREC
Figure 5. Power Down/Up Mode AC Waveforms
5/17
M48Z58, M48Z58Y
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