參數(shù)資料
型號: M5-256/68-12VI/1
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 4/42頁
文件大小: 0K
描述: IC CPLD ISP 256MC 68IO 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: MACH® 5
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 12.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
宏單元數(shù): 256
輸入/輸出數(shù): 68
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
12
MACH 5 Family
SECURITY BIT
A programmable security bit is provided on the MACH 5 devices as a deterrent to unauthorized copying of
the array configuration patterns. Once programmed, this bit defeats readback of the programmed pattern by
a device programmer, securing proprietary designs from competitors. Programming and verification are also
defeated by the security bit. The bit can only be reset by erasing the entire device.
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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