參數(shù)資料
型號： M5-512/160-7YI
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 9/42頁
文件大小： 0K
描述： IC CPLD ISP 512MC 160IO 208PQFP
標(biāo)準(zhǔn)包裝： 24
系列： MACH® 5
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1)： 6.5ns
電壓電源 - 內(nèi)部： 4.5 V ~ 5.5 V
宏單元數(shù)： 512
輸入/輸出數(shù)： 160
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
包裝： 托盤
MACH 5 Family
17
BLOCK DIAGRAM — M5(LV)-320/XXX
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Block
A/Macrocells
0-15
Block
D/Macrocells
0-15
Block
B/Macrocells
0-15
Block
C/Macrocells
0-15
Block
Interconnect
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Block
A/Macrocells
0-15
Block
D/Macrocells
0-15
Block
B/Macrocells
0-15
Block
C/Macrocells
0-15
Block
Interconnect
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Block
A/Macrocells
0-15
Block
D/Macrocells
0-15
Block
B/Macrocells
0-15
Block
C/Macrocells
0-15
Block
Interconnect
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Block
A/Macrocells
0-15
Block
D/Macrocells
0-15
Block
B/Macrocells
0-15
Block
C/Macrocells
0-15
Block
Interconnect
S
E
G
M
E
N
T
CLK0
CLK1
CLK2
CLK3
4
SEGMENT
0
SEGMENT
4
SEGMENT
2
SEGMENT
1
I 0
I 1
I 2
I 3
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Control
Generator
64
PT
2
PT
OE
I/O
Cells
16
32
7
PT
7
2
32
16
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Macrocells
Control
Generator
64
PT
2
PT
OE
16
32
7
PT
7
2
32
16
I/O
Cells
64
x
73
AND
Logic
Array
and
Logic
Allocator
Block
A/Macrocells
0-15
Block
D/Macrocells
0-15
Block
B/Macrocells
0-15
Block
C/Macrocells
0-15
Block
Interconnect
IN
T
E
R
C
O
N
E
C
T
SEGMENT
3
20446G-010
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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