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參數(shù)資料
| 型號(hào)： | M50FW080NB5TG |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
| 中文描述： | 8兆1兆× 8，統(tǒng)一座3V電源閃存固件集線器 |
| 文件頁數(shù)： | 16/47頁 |
| 文件大?。?/td> | 765K |
| 代理商： | M50FW080NB5TG |
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M50FW080
Firmware Hub (FWH) General Purpose Input
Register
The Firmware Hub (FWH) General Purpose Input
Register holds the state of the Firmware Hub Inter-
face General Purpose Input pins, FGPI0-FGPI4.
When this register is read, the state of these pins
is returned. This register is read-only and writing to
it has no effect.
The signals on the Firmware Hub Interface Gener-
al Purpose Input pins should remain constant
throughout the whole Bus Read cycle in order to
guarantee that the correct data is read.
Manufacturer Code Register
Reading the Manufacturer Code Register returns
the manufacturer code for the memory. The man-
ufacturer code for STMicroelectronics is 20h. This
register is read-only and writing to it has no effect.
Device Code Register
Reading the Device Code Register returns the de-
vice code for the memory, 2Dh. This register is
read-only and writing to it has no effect.
Table 12. Lock Register Bit Definitions
Note: Applies to Top Block Lock Register (T_BLOCK_LK) and Top Block [-1] Lock Register (T_MINUS01_LK) to Top Block [-15] Lock Reg-
ister (T_MINUS15_LK).
Table 13. General Purpose Input Register Definition
Note: Applies to the General Purpose Input Register (FGPI_REG).
Bit
Bit Name
Value
Function
7-3
Reserved
2
Read-Lock
‘1’
Bus Read operations in this Block always return 00h.
‘0’
Bus read operations in this Block return the Memory Array contents. (Default
value).
1
Lock-Down
‘1’
Changes to the Read-Lock bit and the Write-Lock bit cannot be performed. Once a
‘1’ is written to the Lock-Down bit it cannot be cleared to ‘0’; the bit is always reset
to ‘0’ following a Reset (using RP or INIT) or after power-up.
‘0’
Read-Lock and Write-Lock can be changed by writing new values to them. (Default
value).
0
Write-Lock
‘1’
Program and Block Erase operations in this Block will set an error in the Status
Register. The memory contents will not be changed. (Default value).
‘0’
Program and Block Erase operations in this Block are executed and will modify the
Block contents.
Bit
Bit Name
Value
Function
7-5
Reserved
4FGPI4
‘1’
Input Pin FGPI4 is at VIH
‘0’
Input Pin FGPI4 is at VIL
3FGPI3
‘1’
Input Pin FGPI3 is at VIH
‘0’
Input Pin FGPI3 is at VIL
2FGPI2
‘1’
Input Pin FGPI2 is at VIH
‘0’
Input Pin FGPI2 is at VIL
1FGPI1
‘1’
Input Pin FGPI1 is at VIH
‘0’
Input Pin FGPI1 is at VIL
0FGPI0
‘1’
Input Pin FGPI0 is at VIH
‘0’
Input Pin FGPI0 is at VIL
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