- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377830 > M50LPW012K1T (意法半導體) 2 Mbit 256Kb x8, Boot Block 3V Supply Low Pin Count Flash Memory PDF資料下載
參數(shù)資料
| 型號： | M50LPW012K1T |
| 廠商： | 意法半導體 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block 3V Supply Low Pin Count Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，啟動塊3V電源低引腳數(shù)快閃記憶體 |
| 文件頁數(shù)： | 5/35頁 |
| 文件大?。?/td> | 239K |
| 代理商： | M50LPW012K1T |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁
5/35
M50LPW012
V
LKO
. This prevents Bus Write operations from
accidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the
memory contents being altered will be invalid.
After V
CC
becomes valid the Command Interface
is reset to Read mode.
A 0.1μF capacitor should be connected between
the V
CC
Supply Voltage pins and the V
SS
Ground
pin to decouple the current surges from the power
supply. Both V
CC
Supply Voltage pins must be
connected to the power supply. The PCB track
widths must be sufficient to carry the currents
required during program and erase operations.
V
PP
Optional Supply Voltage.
The V
PP
Optional
Supply Voltage pin is used to select the Fast
Program (see the Quadruple Byte Program
Command description) and Fast Erase options of
the memory. V
PP
can be left floating. When V
PP
=
V
PPH
Fast Program (if a Quadruple Byte Program
Command is performed) and Fast Erase
operations are used.
V
PP
should not be set to V
PPH
for more than 80
hours during the life of the memory.
V
SS
Ground.
V
SS
is the reference for all the volt-
age measurements.
be changed until the operation completes or un-
predictable results may occur. Care should be tak-
en to avoid unpredictable behavior by changing
WP during Program or Erase Suspend.
Reserved for Future Use (RFU).
These pins do
not have assigned functions in this revision of the
part. They may be left disconnected or driven Low,
V
IL
, or High, V
IH
.
Address/Address Multiplexed (A/A Mux)
Signal Descriptions
For the Address/Address Multiplexed (A/A Mux)
Interface see Figure 2, Logic Diagram, and Table
4, Signal Names.
Address Inputs (A0-A10).
The Address Inputs
are used to set the Row Address bits (A0-A10) and
the Column Address bits (A11-A17). They are
latched during any bus operation by the Row/Col-
umn Address Select input, RC.
Data Inputs/Outputs (DQ0-DQ7).
The Data In-
puts/Outputs hold the data that is written to or read
from the memory. They output the data stored at
the selected address during a Bus Read opera-
tion. During Bus Write operations they represent
the commands sent to the Command Interface of
the internal state machine. The Data Inputs/Out-
puts, DQ0-DQ7, are latched during a Bus Write
operation.
Output Enable (G).
The Output Enable, G, con-
trols the Bus Read operation of the memory.
Write Enable (W).
The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Row/Column Address Select (RC).
The
Column Address Select input selects whether the
Address Inputs should be latched into the Row
Address bits (A0-A10) or the Column Address bits
(A11-A17). The Row Address bits are latched on
the falling edge of RC whereas the Column
Address bits are latched on the rising edge.
Ready/Busy Output (RB).
The Ready/Busy pin
gives the status of the memory’s Program/Erase
Controller. When Ready/Busy is Low, V
OL
, the
memory is busy with a Program or Erase operation
and it will not accept any additional Program or
Erase command except the Program/Erase
Suspend command. When Ready/Busy is High,
V
OH
, the memory is ready for any Read, Program
or Erase operation.
Supply Signal Descriptions
The Supply Signals are the same for both interfac-
es.
V
CC
Supply Voltage.
The V
CC
Supply Voltage
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
The Command Interface is disabled when the V
CC
Supply Voltage is less than the Lockout Voltage,
Row/
Table 4. Signal Names (A/A Mux Interface)
IC
Interface Configuration
A0-A10
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
G
Output Enable
W
Write Enable
RC
Row/Column Address Select
RB
Ready/Busy Output
RP
Interface Reset
V
CC
Supply Voltage
V
PP
Optional Supply Voltage for Fast
Program and Fast Erase
Operations
V
SS
Ground
NC
Not Connected Internally
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M50LPW040 | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K5T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040N | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M50LPW040 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K1 | 功能描述:閃存 3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M50LPW040K1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW040K5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復。