參數(shù)資料
型號: M52338FP
廠商: Mitsubishi Electric Corporation
英文描述: INTERFACE IC FOR ACTIVE MATRIX LIQUID CRYSTAL PANEL
中文描述: 接口集成電路的有源矩陣液晶面板
文件頁數(shù): 1/12頁
文件大小: 136K
代理商: M52338FP
INTERFACE IC FOR ACTIVE MATRIX LIQUID CRYSTAL PANEL
M52338FP
MITSUBISHI ICs (TV)
1
5
2
3
4
6
7
8
9
13
10
11
12
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC1
EXT IN R
SUB CONTRAST B
EXT IN G
SUB CONTRAST R
EXT IN R
γ
2
γ
1
CONTRAST
BRIGHT
FRP1 IN
R OUT
SUB BIAS R
G OUT
SUB BIAS B
B OUT
12
8
DESCRIPTION
The M52338FP is a semiconductor integrated circuit containing an
interface circuit which is necessary to drive an active matrix liquid
crystal panel.
FEATURES
γ
correction circuit is built in to correct non-linearity of luminance
characteristics caused by applied voltage which is peculiar to a
liquid crystal panel.
By combining with Mitsubishi video/chroma signal processing
ICs, M52042FP (NTSC) and M52045FP (PAL), low cost and
optimal system configuration is possible.
APPLICATION
Active matrix liquid crystal color television
RECOMMENDED OPERATING CONDITION
BLOCK DIAGRAM
1
SW
7
γ
1
25
γ
2
26
28
SUB
CONTRAST
B
BRIGHT
23
30
CLAMP R
2
21
COMMON GAIN
CONT.
GND
V
CC1
V
EE
CP
CONT.
CONTRAST
COMMON
OUT
PIN CONFIGURATION (TOP VIEW)
Outline 32P2U-B
M
MAIN IN R
CLAMP R
MAIN IN G
CLAMP G
MAIN IN B
CLAMP B
MAIN/EXT SW
HD IN
CP CONT.
V
CC2
V
EE
FRP2 IN
COMMON GAIN CONT.
COMMON OUT
BIAS CONT.
GND
CP
CP
CP
CP
CP
CP
3
5
27
29
31
γ
-AMP
γ
-AMP
γ
-AMP
CONTRAST
CONTRAST
CONTRAST
BRIGHT
CLAMP
SUB BIAS
SUB BIAS
SUB BIAS
BRIGHT
CLAMP
BRIGHT
CLAMP
DRIVE BUFFER
PEAK LIMITER
19
MAIN
EXT
SW
CLAMP
COMMON
INV
C P
CLAMP G
4
CLAMP B
6
SUB
BIAS
R
20
SUB
BIAS
B
18
15
17
13
14
9
DRIVE BUFFER
PEAK LIMITER
DRIVE BUFFER
PEAK LIMITER
MAIN IN R
FRP1
R OUT
G OUT
B OUT
BIAS
CONT.
11
22
10
16
32
24
V
CC2
FRP1 IN
SUB
CONTRAST
R
MAIN IN G
MAIN IN B
EXT IN R
EXT IN G
EXT IN B
HO IN
FRP2 IN
C P
GND=0V,V
CC1
=V
CC2
V
CC1
V
CC2
V
EE
4.0 to 5.5V
-7.0 to 8.5V
4.5V
-7.5V
Supply voltage
Operating
supply voltage
Recommended
supply voltage
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