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參數(shù)資料
| 型號： | M52342 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | PLL-SPLIT VIF/SIF IC |
| 中文描述： | 鎖相環(huán)分割資料表格/應(yīng)力強度因子集成電路 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 97K |
| 代理商： | M52342 |
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
4
ELECTRICAL CHARACTERISTICS TEST METHOD
Video S/N
Input SG2 into VIF IN and measure the video out (Pin 18) noise in
r.m.s at TP18B through a 5MHz (-3dB) L.P.F.
BW Video band width
1. Measure the 1MHz component level of EQ output TP18A with a
spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF
IN. At that time, measure the voltage at TP8 with SW8, set to
position 2, and then fix V8 at that voltage.
2. Reduce f2 and measure the value of (f2-f0) when the (f2-f0)
component level reaches -3dB from the 1MHz component level
as shown below.
VIN MIN Input sensitivity
Input SG4 (Vi=90dB
μ
) into VIF IN, and then gradually reduce Vi and
measure the input level when the 20kHz component of EQ output
TP18A reaches -3dB from Vo det level.
VIN MAX Maximum allowable input
1. Input SG5 (Vi=90dB
μ
) into VIF IN, and measure the level of the
20kHz component of EQ output.
2. Gradually increase the Vi of SG and measure the input level
when the output reaches -3dB.
GR AGC control range
GR=VIN MAX-VIN MIN (dB)
V3 RF AGC operating voltage
Input SG8 into VIF IN, and gradually reduce Vi and then measure
the input level when RF AGC output TP3 reaches 1/2 V
CC
, as
shown below.
CL-U Capture range
1. Increase the frequency of SG9 until the VCO is out of locked-
oscillation.
2. Decrease the frequency of SG9 and measure the frequency fU
when the VCO locks.
CL-U=fU-58.75 (MHz)
CL-L Capture range
1. Decrease the frequency of SG9 until the VCO is out of locked-
oscillation.
2. Increase the frequency of SG9 and measure the frequency fL
when the VCO locks.
CL-L=58.75-fL (MHz)
CL-T Capture range
CL-T=CL-U+CL-L (MHz)
μ
AFT sensitivity, V
2H
Maximum AFT voltage, V
2L
Minimum AFT
voltage
1. Input SG10 into VIF IN , and set the frequency of SG10 so that
the voltage of AFT output TP2 is 3V. This frequency is named
f(3).
2. Set the frequency of SG10 so that the AFT output voltage is 2V.
This frequency is named f (2)
S/N=20 log
0.7
×
Vo det
NOISE
(dB)
TP18
-3dB
1MHz
BW
( f2 - f0 )
TP3
Voltage
Vi
V
3H
Vi (dB
μ
)
V
3L
1/2V
CC
相關(guān)PDF資料 |
PDF描述 |
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| M52342FP | PLL-SPLIT VIF/SIF IC |
| M52342SP | PLL-SPLIT VIF/SIF IC |
| M52347 | SYNC SIGNAL PROCESSOR |
| M52347FP | SYNC SIGNAL PROCESSOR |
| M52347SP | SYNC SIGNAL PROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M52342FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:PLL-Split VIF/SIF IC |
| M52342SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PLL-SPLIT VIF/SIF IC |
| M52346SP | 制造商:Panasonic Industrial Company 功能描述:IC |
| M52347 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SYNC SIGNAL PROCESSOR |
| M52347FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SYNC SIGNAL PROCESSOR |
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