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參數(shù)資料
| 型號(hào)： | M54995FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | nullBi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER |
| 中文描述： | nullBi全CMOS 8位串行輸入鎖存驅(qū)動(dòng) |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 354K |
| 代理商： | M54995FP |
Bi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER
M54995P/FP
MITSUBISHI <CONTROL / DRIVER IC>
DESCRIPTION
The M54995 is a semiconductor integrated circuit consisting of 8
stages of CMOS shift registers and latches with serial inputs and
serial or parallel outputs. It is based on Bi-CMOS process
technology, and has 8 bipolar drivers at the parallel outputs.
FEATURES
G
Serial input and serial or parallel output
G
Serial output enables cascade connection
G
Built-in latch for each stage
G
Enable input provides output control
G
Low supply current (standby current I
CC
≤
10
μ
A)
G
Serial I/O level is compatible with typical CMOS devices
G
Driver features: High withstand voltage (BV
CEO
≥
30V)
G
Wide operating temperature range T
a
=-20 – +75
°
C
APPLICATION
Dot drivers for thermal print heads. Serial/parallel conversion.
Drivers for relays and solenoids.
FUNCTION
The M54995 consists of 8 stages of D-type flip flops connected to
8 latches.
Data is input to serial input S-IN, and clock pulses are input to
clock input T. When the clock changes from low to high, the input
data enters the first shift register and data already in the shift
registers is shifted sequentially.
The serial output S-OUT is used to connect multiple M54995 to
expand the number of parallel outputs. S-OUT is connected to S-IN
of the next stage.
For parallel output. When the clock pulse changes from low to
high, latch input (LATCH) is high and output enable input (EN) is
low the serial input data at S-IN appears at output O1 and the other
data already present is shifted sequentially to outputs O2 through
O8.
The parallel outputs are inverted.
When the latch input is held low, the latch retains the stored data.
When the EN input is high, outputs O1 through O8 all turn off. As
the internal logic is unstable when the power is turned on, the EN
input should be kept high (setting outputs O1 through O8 off) until
input data is set and the internal logic is initialized.
L-GND is the GND of CMOS logic circuit and P-GND is the GND of
output driver circuits O1 through O8 which employ bipolar
transistors capable of large drive currents.
BLOCK DIAGRAM
PIN CONFIGURATION (TOP VIEW)
Outline
16P4(P)
16P2N-A(FP)
16
13
14
15
1
4
3
2
12
5
11
6
10
7
9
8
→
→
←
→
→
→
→
→
→
→
→
→
→
T
S-IN
L-GND
V
CC
S-OUT
LATCH
EN
P-GND
O1
O2
O3
O4
O5
O6
O7
O8
Clock
Serial input
Logic GND
Power supply
Serial output
Latch input
Enable input
Driver GND
Parallel outputs
M
Serial output
Q
L D
Q
T
D
O1
16
Parallel outputs
Q
L D
Q
T
D
O2
15
Q
L D
Q
T
D
O3
14
Q
L D
Q
T
D
O4
13
Q
L D
Q
T
D
O5
12
Q
L D
Q
T
D
O6
11
Q
L D
Q
T
D
O7
10
Q
L D
Q
T
D
O8
9
4
6
3
1
7
5
8
Power supply
EN
Enable input
LATCH
Latch input
S-IN
Serial input
T
Clock
2
S-OUT
P-GND
Driver GND
L-GND
Logic GND
V
CC
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|---|---|
| M54995P | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:nullBi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER |
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