參數(shù)資料
型號(hào): M54HC4518M1R
廠商: 意法半導(dǎo)體
英文描述: TERM. F/O CABLE SC-SC/ DPLX/RISER/10M/YELLOW
中文描述: HC4518雙十進(jìn)制計(jì)數(shù)器HC4520雙4位二進(jìn)制計(jì)數(shù)器
文件頁(yè)數(shù): 1/13頁(yè)
文件大?。?/td> 270K
代理商: M54HC4518M1R
M54/M74HC4518
M54/M74HC4520
March 1993
HC4520 DUAL 4 BIT BINARY COUNTER
HC4518 DUAL DECADE COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXXF1R
M74HCXXXXB1R
M74HCXXXXM1R
M74HCXXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
The M54/74HC4518/4520 are high speed CMOS
DUAL 4 BIT BINARY COUNTERS fabricated in sili-
con gate C
2
MOS technology. Theyhave the same
high speed performance of LSTTL combined with
true CMOS low power consumption.
They consists of two identical internally syn-
chronous 4-stage counters. The counter stages are
D-type flip-flops having interchangeable Clock and
ENABLE inputs for incrementing on either theposi-
tive-going or negative-going transition.
Forsingle-unit operation theENABLE input ismain-
tained ”high” and the counter advances on each
positive-going
transition of the CLOCK. The
counters are cleared by high levels on their clear
lines. The counter can be cascaded in the ripple
mode by connecting Q4 to the enable input of the
subsequentcounterwhiletheclockinput ofthelatter
is heldpermanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
.
HIGH SPEED
f
MAX
= 55 MHz (TYP.) at V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN AND FUNCTION COMPATIBLE WITH
4520B/4518B
1/13
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