參數(shù)資料
型號: M54HCT241F1R
廠商: 意法半導體
英文描述: OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT240: INVERTED - HCT241/244 NON INVERTED
中文描述: 八路總線緩沖器與三態(tài)輸出HCT240:倒立- HCT241/244非反相
文件頁數(shù): 1/12頁
文件大?。?/td> 262K
代理商: M54HCT241F1R
M54HCT240/241/244
M74HCT240/241/244
September 1993
HCT240: INVERTED - HCT241/244 NON INVERTED
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
o
C
.
COMPATIBLE WITHTTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 6 mA (MIN)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS240/241/244
OCTAL BUS BUFFERWITH3 STATE OUTPUTS
B1R
(Plastic Package)
ORDER CODES :
M54HCTXXXF1R
M74HCTXXXB1R
M74HCTXXXM1R
M74HCTXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTION
(top view)
.
HIGH SPEED
t
PD
= 13 ns(TYP.) at V
CC
= 5V
DESCRIPTION
The M54/74HCT240, HCT241 and HCT244 are
high
speed
CMOS
OCTAL
fabricated in silicon gate C
2
MOS technology.
They have the same high speed performance of
LSTTL combined with true CMOS low power
consumption. The designer has a choise of select
combination ofinverting and non-inverting outputs,
symmetrical G (active lowoutput control) input, and
complementary G and G inputs. Each control input
governs four BUS BUFFERs.
This integrated
circuit has input and output
BUS
BUFFERs
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC
2
MOS systems
with TTL and NMOS components.
They are also plug in replacements for LSTTL
devices giving a reduction of power consumption.
These devices are designed to be used with 3state
memory address drivers, etc.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
HCT244
HCT241
HCT240
1/12
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