參數(shù)資料
型號： M54HCT688F1R
廠商： 意法半導(dǎo)體
英文描述： 8 BIT EQUALITY COMPARATOR
中文描述： 8位平等比較器
文件頁數(shù)： 1/10頁
文件大?。?/td> 242K
代理商： M54HCT688F1R
M54HCT688
M74HCT688
February 1993
8 BIT EQUALITY COMPARATOR
B1R
(Plastic Package)
ORDER CODES :
M54HCT688F1R
M74HCT688B1R
M74HCT688M1R
M74HCT688C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
The M54/74HCT688 utilizes silicon gate C
2
MOS
technology to achieve operating speeds equivalent
to LSTTL devices. Along with the low power
dissipation and high noise immunity of standard
C
2
MOS integrated circuit, it possesses the driving
capability of 10 LSTTL load. The M54/74HCT688
compares bitforbittwo8-bit wordsapplied on inputs
P0 - P7 and inputs Q0 - Q7 and indicates whether
or not they are equal. A single active low enable is
provided to facilitate cascading several packages to
enable comparison of words greater than 8 bits.
This integrated circuit has input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC
2
MOS systems
with TTL and NMOS components. They are also
plug in replacements for LSTTL devices giving a
reduction of power consumption.
All inputs are equipped with protection circuit
against static discharge and transient excess
voltage.
.
HIGH SPEED
t
PD
= 17 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
COMPATIBLE WITHTTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
|
=
I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS688
1/10
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