參數(shù)資料
型號: M58LW128B150N6T
廠商: 意法半導體
英文描述: 128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
中文描述: 128兆位和8Mb x16或4Mb的X32號,統(tǒng)一座,突發(fā)3V電源閃存
文件頁數(shù): 24/65頁
文件大?。?/td> 932K
代理商: M58LW128B150N6T
M58LW128A, M58LW128B
24/65
COMMAND INTERFACE
All Bus Write operations to the memory are inter-
preted by the Command Interface. Commands
consist of one or more sequential Bus Write oper-
ations. The Commands are summarized in Table
9, Commands. Refer to Table 9 in conjunction with
the text descriptions below.
After Power-Up or a Reset operation the memory
enters Read mode.
Synchronous Read operations and Latch Con-
trolled Bus Read operations can only be used to
read the memory array. The Electronic Signature,
CFI or Status Register will be read in Asynchro-
nous mode regardless of the Burst Control Regis-
ter settings. Once the memory returns to Read
Memory Array mode the bus will resume the set-
ting in the Burst Configuration Register automati-
cally.
Read Memory Array Command.
The Read Mem-
ory Array command returns the memory to Read
mode. One Bus Write cycle is required to issue the
Read Memory Array command and return the
memory to Read mode. Once the command is is-
sued the memory remains in Read mode until an-
other command is issued. From Read mode Bus
Read operations will access the memory array.
While the Program/Erase Controller is executing a
Program, Erase, Block Protect or Blocks Unpro-
tect operation the memory will not accept the Read
Memory Array command until the operation com-
pletes.
Read Electronic Signature Command.
The Read
Electronic Signature command is used to read the
Manufacturer Code, the Device Code and the
Block Protection Status. One Bus Write cycle is re-
quired to issue the Read Electronic Signature
command. Once the command is issued subse-
quent Bus Read operations read the Manufacturer
Code, the Device Code or the Block Protection
Status until another command is issued; see Table
10, Read Electronic Signature.
Read Query Command.
The Read Query Com-
mand is used to read data from the Common Flash
Interface (CFI) Memory Area. One Bus Write cycle
is required to issue the Read Query Command.
Once the command is issued subsequent Bus
Read operations read from the Common Flash In-
terface Memory Area. See Appendix B, Tables 29,
30, 31, 32, 33 and 34 for details on the information
contained in the Common Flash Interface (CFI)
memory area.
Note that the addresses for the Common Flash In-
terface Memory Area are A1-A23 for the
M58LW128A and A2-A23 for the M58LW128B, re-
gardless of the Bus Width selected.
Read Status Register Command.
The Read Sta-
tus Register command is used to read the Status
Register. One Bus Write cycle is required to issue
the Read Status Register command. Once the
command is issued subsequent Bus Read opera-
tions read the Status Register until another com-
mand is issued.
The Status Register information is present on the
output data bus (DQ1-DQ7) when both Chip En-
able and Output Enable are low, V
IL
.
See the section on the Status Register and Table
12 for details on the definitions of the Status Reg-
ister bits
Clear Status Register Command.
The Clear Sta-
tus Register command can be used to reset bits 1,
3, 4 and 5 in the Status Register to ‘0’. One Bus
Write is required to issue the Clear Status Register
command.
The bits in the Status Register are sticky and do
not automatically return to ‘0’ when a new Write to
Buffer and Program, Erase, Block Protect or Block
Unprotect command is issued. If any error occurs
then it is essential to clear any error bits in the Sta-
tus Register by issuing the Clear Status Register
command before attempting a new Program,
Erase or Resume command.
Block Erase Command.
The Block Erase com-
mand can be used to erase a block. It sets all of
the bits in the block to ‘1’. All previous data in the
block is lost. If the block is protected then the
Erase operation will abort, the data in the block will
not be changed and the Status Register will output
the error.
Two Bus Write operations are required to issue the
command; the second Bus Write cycle latches the
block address in the internal state machine and
starts the Program/Erase Controller. Once the
command is issued subsequent Bus Read opera-
tions read the Status Register. See the section on
the Status Register for details on the definitions of
the Status Register bits.
During the Erase operation the memory will only
accept the Read Status Register command and
the Program/Erase Suspend command. All other
commands will be ignored. Typical Erase times
are given in Table 11.
See Appendix C, Figure 27, Block Erase Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Block Erase command.
Write to Buffer and Program Command.
The
Write to Buffer and Program command is used to
program the memory array.
Up to 2 pages of 8 Words (or 4 Double Words) can
be loaded into the Write Buffer and programmed
into the memory. The 2 pages are selected by ad-
dress A4. Each Write Buffer has the same A5 -A23
addresses.
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M58LW128B150ZA1E 128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
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M58LW128B150ZA1E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
M58LW128B150ZA1F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
M58LW128B150ZA1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
M58LW128B150ZA6E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories
M58LW128B150ZA6F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories