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參數(shù)資料
| 型號(hào)： | M5M417400CJ-7 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
| 中文描述： | 快速頁面模式16777216位（4194304 - Word的4位）動(dòng)態(tài)隨機(jī)存儲(chǔ)器 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 657K |
| 代理商： | M5M417400CJ-7 |
MITSUBISHI LSIs
M5M417400CJ,TP-5,-6,-7,-5S,-6S,-7S
FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM
5
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write, Refresh, and Fast-Page Mode Cycles)
(Ta = 0 ~ 70°C, V
CC
= 5V ± 10%, V
SS
= 0V, unless otherwise noted. See notes 12, 13)
Note 12:
The timing requirements are assumed t
T
= 5ns.
13: V
IH(min)
and V
IL(max)
are reference levels for measuring timing of input signals.
14: t
RCD(max)
is specified as a reference point only. If t
RCD
is less than t
RCD(max)
, access time is t
RAC
. If t
RCD
is greater than t
RCD(max)
, access time is controlled exclusively by
t
CAC
AA
. t
RCD(min)
is specified as t
RCD(min)
= t
RAH(min)
+ 2t
H
+ t
ASC(min)
15:
t
RAD(max)
is specified as a reference point only. If t
RAD
≥
t
RAD(max)
and t
ASC
≤
t
ASC(max)
, access time is controlled exclusively by t
AA
.
16:
t
ASC(max)
is specified as a reference point only. If t
RCD
≥
t
RCD(max)
and t
ASC
≥
t
ASC(max)
, access time is controlled exclusively by t
CAC
.
17:
Either t
DZC
or t
DZO
must be satisfied.
18:
Either t
CDD
or t
ODD
must be satisfied.
19:
t
T
is measured between V
IH(min)
and V
IL(max)
.
Read and Refresh Cycles
Note 20:
Either t
RCH
or t
RRH
must be satisfied for a read cycle.
Symbol
Parameter
Limits
Unit
M5M417400C-5,-5S
M5M417400C-6,-6S
M5M417400C-7,-7S
Min
Max
Min
Max
Min
Max
t
REF
Refresh cycle time
32
32
32
ms
t
RP
RAS high pulse width
30
40
50
ns
t
RCD
Delay time, RAS low to CAS low
(Note 14)
18
37
20
45
20
50
ns
t
CRP
Delay time, CAS high to RAS low
10
10
10
ns
t
RPC
Delay time, RAS high to CAS low
0
0
0
ns
t
CPN
CAS high pulse width
10
10
10
ns
t
RAD
Column address delay time from RAS low
(Note 15)
13
25
15
30
15
35
ns
t
ASR
Row address setup time before RAS low
0
0
0
ns
t
ASC
Column address setup time before CAS low
(Note 16)
0
10
0
10
0
10
ns
t
RAH
Row address hold time after RAS low
8
10
10
ns
t
CAH
Column address hold time after CAS low
13
15
15
ns
t
DZC
Delay time, data to CAS low
(Note 17)
0
0
0
ns
t
DZO
Delay time, data to OE low
(Note 17)
0
0
0
ns
t
CDD
Delay time, CAS high to data
(Note 18)
13
15
15
ns
t
ODD
Delay time, OE high to data
(Note 18)
13
15
15
ns
t
T
Transition time
(Note 19)
1
50
1
50
1
50
ns
Symbol
Parameter
Limits
Unit
M5M417400C-5,-5S
M5M417400C-6,-6S
M5M417400C-7,-7S
Min
Max
Min
Max
Min
Max
t
RC
Read cycle time
90
110
130
ns
t
RAS
RAS low pulse width
50
10000
60
10000
70
10000
ns
t
CAS
CAS low pulse width
13
10000
15
10000
20
10000
ns
t
CSH
CAS hold time after RAS low
50
60
70
ns
t
RSH
RAS hold time after CAS low
13
15
20
ns
t
RCS
Read setup time after CAS high
0
0
0
ns
t
RCH
Read hold time after CAS low
(Note 20)
0
0
0
ns
t
RRH
Read hold time after RAS low
(Note 20)
10
10
10
ns
t
RAL
Column address to RAS hold time
25
30
35
ns
t
OCH
CAS hold time after OE low
13
15
20
ns
t
ORH
RAS hold time after OE low
13
15
20
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M417400CJ-7S | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
| M5M417400CTP-5 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
| M5M417400CTP-5S | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
| M5M417400CTP-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
| M5M417400CTP-6S | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE 16777216-BIT (4194304-WORD BY 4-BIT) DYNAMIC RAM |
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