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| 型號(hào)： | M5M44260CTP-7S |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| 中文描述： | 快速頁(yè)面模式4194304位（262144字由16位）動(dòng)態(tài)隨機(jī)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 6/29頁(yè) |
| 文件大?。?/td> | 283K |
| 代理商： | M5M44260CTP-7S |
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FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S
MITSUBISHI LSIs
M5M44260CJ,TP-5,-5S : Under development
6
Read-Write and Read-Modify-Write Cycles
Note 22:
t
RWC
is specified as
t
RWC(min)
=
t
RAC(max)
+
t
ODD(min)
+
t
RWL(min)
+
t
RP(min)
+4
t
T
.
23:
t
WCS
,
t
CWD
,
t
RWD
and
t
AWD
and
t
CPWD
are specified as reference points only. If
t
WCS
≥
t
WCS(min)
the cycle is an early write cycle and the DQ pins
will remain high impedance throughout the entire cycle. If
t
CWD
≥
t
CWD(min)
,
t
RWD
≥
t
RWD(min)
,
t
AWD
≥
t
AWD(min)
and
t
CPWD
≥
t
CPWD(min)
(for fast page mode cycle only), the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address.
If neither of the above condition (delayed write) of the DQ (at access time and until CAS or OE goes back to V
IH
) is indeterminate.
Limits
Min
126
86
Max
Parameter
Read write/read modify write cycle time
RAS low pulse width
CAS low pulse width
CAS hold time after RAS low
RAS hold time after CAS low
Read setup time before CAS low
Delay time, CAS low to W low
Delay time, RAS low to W low
Delay time, address to W low
CAS hold time after W low
RAS hold time after W low
Symbol
t
RWC
t
RAS
t
CAS
t
CSH
t
RSH
t
RCS
t
CWD
t
RWD
t
AWD
t
CWL
t
RWL
t
WP
t
DS
t
DH
t
OEH
Unit
Min
150
Max
Min
180
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 22)
(Note 23)
(Note 23)
(Note 23)
Write pulse width
Data setup time before CAS low or W low
Data hold time after CAS low or W low
OE hold time after W low
15
13
20
10000
10000
10000
10000
10000
55
0
35
80
50
100
55
100
15
15
10
0
10
49
0
31
68
43
49
86
13
13
8
0
8
70
0
45
95
60
120
70
120
20
20
15
0
15
M5M44260C-5,-5S M5M44260C-6,-6S M5M44260C-7,-7S
Write Cycle (Early Write and Delayed Write)
Limits
Min
90
50
13
50
13
Max
Parameter
Write cycle time
RAS low pulse width
CAS low pulse width
CAS hold time after RAS low
RAS hold time after CAS low
Symbol
t
WC
t
RAS
t
CAS
t
CSH
t
RSH
t
WCS
t
WCH
t
CWL
t
RWL
t
WP
t
DS
t
DH
t
OEH
Unit
Min
110
60
15
60
15
Max
Min
130
70
20
70
20
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write setup time before CAS low
Write hold time after CAS low
CAS hold time after W low
RAS hold time after W low
Write pulse width
(Note 23)
10000
10000
10000
10000
10000
10000
8
0
13
13
8
0
8
13
10
15
15
10
0
10
15
0
OE hold time after W low
Data setup time before CAS low or W low
Data hold time after CAS low or W low
15
20
20
0
15
20
0
15
M5M44260C-5,-5S M5M44260C-6,-6S M5M44260C-7,-7S
10000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M5M44260CJ-5S | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44260CJ-6 | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44260CJ-6S | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44260CJ-7 | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44260CJ-7S | FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M44265CJ | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44265CJ-5 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44265CJ-5S | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44265CJ-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
| M5M44265CJ-6S | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM |
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