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參數(shù)資料
| 型號： | M5M532R16TP-15 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 524288-BIT (32768-WORD BY 16-BIT) CMOS STATIC RAM |
| 中文描述： | 524288位（32768字由16位）的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 74K |
| 代理商： | M5M532R16TP-15 |
M5M532R16J,TP-10,-12,-15
MITSUBISHI LSIs
524288-BIT (32768-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI
ELECTRIC
Write cycle (/W control mode)
A
0~14
/W
/S
t
CW
(W)
/OE
tsu
(S)
tsu
(A-WH)
(A)
tsu
(Note8)
(Note8)
t
w
(W)
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
Note 8: Hatching indicates the state is don't care.
9: When the falling edge of /W is simultaneous or prior to the falling edge of /S, the output is maintained in the high impedance.
10: t
en
,t
dis
are periodically sampled and are not 100% tested.
/LB,/UB
t
dis
(OE)
V
IH
V
IL
Note 7. Addresses , /S and /OE valid prior to /LB,/UB transition low by (ta(A)-ta(B)), (ta(S)-ta(B)), (ta(OE)-ta(B)).
Read cycle 4
(Note 7)
/UB,/LB
ta
(B)
/W=H
/S=L
ten
(B)
t
dis
(B)
UNKNOWN
DATA VALID
V
OH
V
OL
DQ
1~16
V
IH
V
IL
(Note 5)
t
CR
(Note 5)
/OE=L
tsu
(B)
(Note8)
(Note8)
DQ
1~16
(Input Data)
t
dis
(OE)
ten
(OE)
ten
(W)
t
dis
(W)
DQ
1~16
(Output Data)
(Note 5)
Hi-Z
V
IH
V
IL
V
OH
V
OL
trec
(D)
tsu
(D)
th
DATA STABLE
6
(Note 5)
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