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參數(shù)資料
| 型號(hào)： | M5M564R16DTP-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM |
| 中文描述： | 1048576位（65536字由16位）的CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 6/7頁(yè) |
| 文件大小： | 90K |
| 代理商： | M5M564R16DTP-10 |
M5M564R16DJ,TP-10,-12,-15
MITSUBISHI LSIs
1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM
MITSUBISHI
ELECTRIC
Write cycle (W control mode)
A
0~15
W
S
t
CW
OE
tsu
(S)
tsu
(A)
(Note 7)
(Note 7)
t
w
(W)
tsu
(A-WH)
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
Note 7: Hatching indicates the state is don't care.
8: When the falling edge of W is simultaneous or prior to the falling edge of S, the output is maintained in the high impedance.
9: t
en
,t
dis
are periodically sampled and are not 100% tested.
LB,UB
V
IH
V
IL
Note 6. Addresses , S and OE valid prior to LB,UB transition low by (ta(A)-ta(B)), (ta(S)-ta(B)), (ta(OE)-ta(B)).
Read cycle 4
(Note 6)
UB,LB
ta
(B)
W=H
S=L
ten
(B)
t
dis
(B)
UNKNOWN
DATA VALID
V
OH
V
OL
DQ
1~16
V
IH
V
IL
(Note 4)
t
CR
(Note 4)
OE=L
tsu
(B)
(Note 7)
(Note 7)
DQ
1~16
(Input Data)
t
dis
(OE)
ten
(OE)
ten
(W)
t
dis
(W)
DQ
1~16
(Output Data)
(Note 4)
Hi-Z
V
IH
V
IL
V
OH
V
OL
trec
(W)
tsu
(D)
th
(D)
DATA STABLE
6
(Note 4)
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| M5M564R16DTP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM |
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