參數(shù)資料
型號: M5M5V408BTP-85H
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 85 ns, PDSO32
封裝: 0.400 INCH, TSOP2-32
文件頁數(shù): 4/12頁
文件大小: 224K
代理商: M5M5V408BTP-85H
12
Data Device Corporation
www.ddc-web.com
SD-14531
H-05/04-0
1.900 MAX
(48.26 MAX)
1.700 ±0.005
(43.2 ±0.13)
0.018 (0.46)
DIAM TYP
0.100 TYP(2.54)
TOL. NON-
CUMULATIVE
0.21 MAX
(5.3)
0.800 MAX
(20.3 MAX)
0.600 ±0.005
(15.2 ±0.13)
CONTRASTING
COLORED BEAD
IDENTIFIES
PIN 1
SIDE VIEW
BOTTOM VIEW
0.25 MIN
(6.35 MIN)
0.015 MAX
(0.39)
SEATING
PLANE
1
19
36
18
NOTES:
1. Dimensions shown are in inches (mm).
2. Lead identification numbers are for reference only.
3. Lead cluster shall be centered within ±0.01(0.25) of outline dimensions. Lead
spacing dimensions apply only at seating plane.
4. Package is kovar with electroless nickel plating.
5. Case is electrically floating.
6. Leads are gold coated kovar.
FIGURE 19. SD-14531 MECHANICAL OUTLINE
36-PIN DDIP (KOVAR)
FIGURE 20. SD-14531 MECHANICAL OUTLINE
36-PIN FLAT PACK (CERAMIC)
NOTES:
1. Dimensions shown are in inches (mm).
2. Lead Cluster to be centralized about case centerline within ±.010.
1
18
19
36
.018±.002
(0.46 ± 0.051)
1.900 MAX
(48.26)
.100 TYP
(2.54)
PIN NUMBERS ARE
FOR REF. ONLY
17 EQ. SP. @
.100 = 1.700
(TOL. NONCUM)1
PIN 1 DENOTED BY CONTRASTING
COLORED BEAD OR INDEX MARK
.40 MIN TYP
(10.2)
.100 ±.010 TYP
(2.54 ±0.25)
.010 ±.002 TYP
(0.25 ±0.05)
.210 MAX
(5.3)
.800 MAX
(20.3)
BOTTOM VIEW
SIDE VIEW
TABLE 7. SD-14531 PINOUTS
FUNCTION
PIN
FUNCTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
S1(Res)
S1(Syn)
-------
S2(Res)
S2(Syn)
Cos(x)
S3(Res)
S3(Syn)
Sin(x)
S4(Res)
-----------
-------
S(Res)
S(Syn)
N/C(x)
SR(Res)
SR(Syn)
N/C(x)
R(Res)
R(Syn)
N/C(x)
RL
RH
VEL
Analog Return (V)
e
INH
CB
BIT
14B
LBE
GND
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
+5 V
HBE
B1 (MSB)
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16 (LSB)
Note: “(Res)” means resolver, “(Syn)” means synchro, and “(x)” means direct. For a direct input unit pins 5, 6, and 7 (S, SR, R)
are no connect.
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