參數(shù)資料
型號(hào): M5M5V416CWG-70HI
元件分類(lèi): SRAM
英文描述: 256K X 16 STANDARD SRAM, 70 ns, PBGA48
封裝: 7 X 8.50 MM, 0.75 MM PITCH, CSP-48
文件頁(yè)數(shù): 8/9頁(yè)
文件大?。?/td> 265K
代理商: M5M5V416CWG-70HI
M5M5V416CWG -55HI, -70HI
2003.08.21
Ver. 7.0
4194304-BIT (262144-WORD BY 16-BIT) CMOS STATIC RAM
RENESAS LSIs
8
tsu (PD)
trec (PD)
ns
ms
2.2V
tsu (PD)
2.7V
trec (PD)
BC1# , BC2# > Vcc-0.2V
Vcc
V
2.0
Vcc (PD)
VI (S1)
Icc (PD)
2.2
BC1#
POWER DOWN CHARACTERISTICS
(1) ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test conditions
Limits
Min
Typ
Max
Units
Power down supply voltage
Chip select input S1#
Power down
supply c urrent
(2) TIMING REQUIREMENTS
Symbol
Parameter
Test conditions
Limits
Min
Typ
Max
Units
Power down set up time
Power down recov ery t ime
(3) TIMING DIAGRAM
BC# control mode On the BC# control mode, the lev el of S1# and S2 must be f ixed at S1# , S2 > Vcc-0.2V or S2 < 0.2V.
VI (BC)
Byte control input BC1# &
BC2#
V
BC2#
tsu (PD)
2.7V
trec (PD)
Vcc
S1#
S1# control mode On the S1# mode, the lev el of S2 must be f ixed at S2 > Vcc-0.2V or S2 < 0.2V.
S1# > Vcc-0.2V
0
5
VI (S2)
Chip select input S2
0.2
0.2V
tsu (PD)
2.7V
trec (PD)
Vcc
S2
S2 control mode
S2 < 0.2V
A
~ +40°C
0.05
-
~ +85°C
~ +25°C
-
0.1
0.8
1.5
-
15
(1) S1#>Vcc-0.2V,
other inputs = 0 ~ Vcc
S2< 0.2V,
(2)
other inputs = 0 ~ Vcc
BC1# and BC2#> Vcc - 0.2V
S1# < 0.2V,S2> Vcc - 0.2V
(3)
other inputs = 0 ~ Vcc
Vcc=2.0V
2.2V
2.2V < Vcc(PD)
2.0V < Vcc(PD) < 2.2V
Vcc(PD)
2.2
Vcc(PD)
V
0.2V
Note 7: Typical parameter of Icc(PD) indicates the value for the
center of distribution at 2.0V, and not 100% tested.
V
~ +70°C
-
7.5
-
2.2V < Vcc(PD)
2.0V < Vcc(PD) < 2.2V
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