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參數(shù)資料
| 型號(hào)： | M61519FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | AUDIO SIGNAL PROCESSOR WITH SURROUND |
| 中文描述： | 音頻信號(hào)的環(huán)繞聲處理器 |
| 文件頁(yè)數(shù)： | 16/19頁(yè) |
| 文件大小： | 346K |
| 代理商： | M61519FP |
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M61530FP
Rev.1.0, Sep.19.2003, page 16 of 18
Reset timing diagram
(1) Reset signal transmission
Reset operation
(2) Reset signal cancellation
VDD (internal power supply)
VCC
VSS (internal power supply)
t
Reset cancellation (normal operation)
5.5V
V
Trst
About 20
μ
s
A
As is shown in the above figure, the reset is cancelled after time Trst after the power-supply voltage has started to rise.
The chip is then able to receive serial data.
(b) Power-off operation (for reference)
The internal VDD and VSS voltages fall as VCC falls (the opposite trend to that in the above figure).
When the logic circuits are turned off, all setting data becomes invalid.
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