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參數(shù)資料
| 型號(hào)： | M61541FP |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | 6ch Electronic Volume with Tone Control |
| 中文描述： | 6通道電子音量與音調(diào)控制 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 331K |
| 代理商： | M61541FP |
M61541FP
Preliminary
Rev.1.0 Sep 09, 2004 page 5 of 15
Relationship Between Data and Clock
D0
D1
D2
D3
D21
D22
D23
DATA
Data signal is read at the rising edge of CLOCK.
Make "H" at the timing which
DATA of D0-D23 make latch.
When DATA is "H", latch signal is
created at the falling edge of CLOCK.
CLOCK
When CLOCK is "L" and latch signal is created,
latch signal is read at the falling edge of DATA.
Clock and Data Timings
tWHC
t
cr
25%
75%
50%
LATCH
tWLC
tf
tr
tHLD tSHD
tHHD
tSLD
tHLD
(D0
D23)
tSLD
DATA
CLOCK
25%
75%
tSC
to
Timing Definition of Digital Block
Limits
Typ
Parameter
Symbol
Min
8
3.2
3.2
1.6
1.6
1.6
1.6
1.6
Max
0.8
0.8
Unit
CLOCK cycle time
CLOCK pulse width ("H" level)
CLOCK pulse width ("L" level)
Rising time of clock and data
Falling time of clock and data
DATA setup time (Rising time of clock)
DATA setup time (Falling time of clock)
DATA hold time ("H" level)
DATA hold time ("L" level)
CLOCK setup time
tcr
tWHC
tWLC
tr
tf
tSHD
tSLD
tHHD
tHLD
tSC
μs
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