
M62383FP
Rev.1.0, Sep.19.2003, page 6 of 9
(c) Analog block
Item
Reference voltage input voltage
Symbol
VREF
Specification Values
Min.
Typ.
GND
Unit
V
Test Conditions
When SDIREF is set to (FF)h,
VREF = MON
GND
≤
VREF
≤
Vcc
SDIREF = (FF)h, SDI =
(FFFF)h, MON output value
SDIREF = (00)h, SDI = (FFFF)h,
MON output value
VREF = 2 to 5V, SDI = (FFFF)h,
255/256VREF-VOR (MON
output value)
IOA =
±
0.5mA, SDIREF = (FF)h,
SDI = (FFFF)h
IOA =
±
0.5mA, SDIREF = (FF)h,
SDI = (0000)h
(Monotone increasing capability)
Max.
Vcc
Reference voltage input current
Upper reference voltage output
voltage (*1)
Lower reference voltage output
voltage (*1)
Reference voltage output offset
voltage (*1)
IREF
VORU
1
4.88
4.98
+1
Vcc
μ
A
V
VORL
GND
0.10
V
VOR
100
100
mV
Upper buffer amp D-A output
voltage
Lower buffer amp D-A output
voltage
Accuracy: Differential
nonlinearity error
Accuracy: Nonlinearity error
Accuracy: Zero scale error
VOAU
4.5
V
VOAL
0.05
V
SDL
1.0
+1.0
LSB
SNL
SZERO
1.0
2.0
+1.0
+2.0
LSB
LSB
VREF = 2 to 5 V: Buffer output
offset (*2)
VREF = 2 to 5 V: Buffer output
offset (*2)
Accuracy: Full-scale error
SFULL
2.0
+2.0
LSB
Reference voltage input pin
capacitance
D-A converter output settling
time
CREF
10
pF
tLDDA
5
10
μ
S
VOA = 0.5
4.5V, IOA = 0.1mA,
Co = 50pF, SDIREF = (FF)h,
Time for output to be absorbed
within ±0.5 LSB
VOA = 0.5
4.5V, no external
load
Time for output to be absorbed
within ±0.5 LSB
Vcc = 0
→
5V, VOA = 0V, VOR =
VREF
×
255/256 set
Reference voltage output
settling time
tLDDR
10
20
μ
S
Power-on reset voltage (*3)
V
RESET
0.8
1.5
3
V
Notes: 1. MON output specification. Equivalent to ±5 LSB.
2. D-A output (D-Axx, D-Axy, D-Ayx, D-Ayy) specification. MON output is stipulated by 3 items in *1 above
(VORU, VORL,
VOR).
3. Reference values