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參數(shù)資料
| 型號： | M65762FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144 |
| 封裝： | 20 X 20 MM, QFP-144 |
| 文件頁數(shù)： | 25/30頁 |
| 文件大小： | 311K |
| 代理商： | M65762FP |
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M65762FP
REJ03F0235-0200 Rev.2.00 Sep 14, 2007
Page 2 of 34
Application
OA equipment including facsimile, copier and printer
Digital and amusement equipment for the purpose of reducing memory
Block Diagram
48
49
50
51
54
55
56
59
57
58
108
109
110
111
132
135
134
133
112
129
CD0 to 31
CDRQ
CDAK*
CDRD*
CDWR*
RESET*
HCS*
HA0 to 3
HWR*
HRD*
HD0 to 7
INTR
MCLK
(Asterisk "*" indicates negative logic.)
Host
bus
I/F
Code
data
I/F
Encoding/decoding
Probability
estimation
table
ROM
Context
table
RAM
Context
generation
Typical
prediction
Line
memory
Pixel data
Image
data
I/F
Parallel
I/F
Serial
I/F
PD0 to 31
PDRQ
PDAK*
PDRD*
PDWR*
PRDY*
PTIM*
PXCK*
PXCKO*
SVID*
RVID*
Description on Block Functions
(1) Host bus I/F block
This bus is used to set command parameters and load the status between the MPU and this block. It is 8-bit bus.
This block is also available to load and store of context table RAM via the host bus.
(2) Code data I/F block
Bus for input/output of coding data. For the bus width, 32 bits, 16 bits or 8 bits can be selected.
Image data can also be transferred (in through mode) between the image data I/F and this block via built-in line
memory. FIFO buffer for 16 bytes are provided in the code data I/F block.
(3) Image data I/F block
The Image data I/F is used for input/output of binary image data. The 32-/16-bit parallel I/F or serial I/F can be
selected. Selection of the serial I/F transfers data in units of 1 pixel in synchronization with the line, using the
handshake signal (PRDY*, PTIM*).
Selection of parallel I/F uses an external DMA controller for DMA transfer (in units of stripe).
The image data I/F provides a function for scale-down of length and breadth by 1/2 in coding and a function for
scale-up of length and breadth by twice in decoding.
(4) Line memory block
4 K-byte memory. This block can be set to a maximum of 8192 pixels/line for 3-line template and can be set to a
maximum of 10240 pixels/line for 2-line template. A line is used for input/output processing of image data to/from
outside and the other lines (2 or 3 lines) are used for encoding/decoding processing. These two processes can be
independently carried out in synchronization with each line.
The contents of line memory can be loaded or stored via the image data I/F or coding data I/F.
(5) Typical prediction block
In the typical prediction mode, compares the encoding/decoding process line agree with the immediately preceding
line and generates pseudo-pixel (SLNTP).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M65790FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FBTC IMAGE DATA COMPRESSION and DECOMPRESSION LSI |
| M65817AFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:Digital Amplifier Processor of S-Master Technology |
| M65818AFP | 制造商:Renesas Electronics Corporation 功能描述:M65818AFP |
| M65821 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:CD PLAYER DIGITAL SIGNAL PROCESSOR |
| M65821FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:CD PLAYER DIGITAL SIGNAL PROCESSOR |
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