參數(shù)資料
型號: M65824AFP
廠商: Mitsubishi Electric Corporation
元件分類: 數(shù)字信號處理
英文描述: CD PLAYER DIGITAL SIGNAL PROCESSOR WITH BUILT-IN DAC
中文描述: CD播放數(shù)字信號處理器,可在援
文件頁數(shù): 5/8頁
文件大?。?/td> 129K
代理商: M65824AFP
SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A
M65824FP
MITSUBISHI SOUND PROCESSOR ICs
( 5
ELECTRIC
MITSUBISHI
FUNCTION DESCRIPTION
1. MICROCOMPUTER INTERFACE
(1) Pin assignments
M65824FP
31
CD-DA
SIGNAL
PROCESSOR
30
32
MSD
MCK
MLAB
I/O
O
O
(2) Description
MLAB: Latch signal/data I/O switching signal
(MLAB="H":Write from μP)
(MLAB="L":Read from μP)
MCK: Clock signal
MSD: Serial data I/O
(3) Operation description
Microcomputer command read/write
Data (MSD) is read at a rising edge of the clock pulse (MCK).
When a command is determined at a falling edge of the latch line
(MLAB), the data line (MSD) is concurrently switched to the output
mode to output a status requested by data bits D3, D2, D1 and D0.
When the latch line is set to "H", the data line is returned to the
input mode again.
Status request/interface command
When requesting various types of the M65824FP status, a
microcomputer writes data in D3, D2, D1 and D0 for indicating the
requested status in advance.
After this command is latched, the status is continuously output
while the latch line (MLAB) is set to "L".
MSD
MCK
MLAB
D0
D1
D2
D3
D4
D5
D6
D7
Status
t1
t2
t4
t3
(4) Microcomputer I/F timing chart
(5) M65824FP command list
Symbol
t1
t2
t3
t4
Parameter
Min.
200
100
100
100
Unit
nsec
nsec
nsec
nsec
Shift clock width
Shift clock setup
Shift clock hold
Shift clock setup
D7
D6
D5
D4
D3
D2
D1
D0
Status/interface command
Audio function
Disk motor
Initial value after power is turned on: 00000000
μP
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