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參數(shù)資料
| 型號(hào)： | M66221FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 256 x 9-BIT MAIL-BOX |
| 中文描述： | 256 × 9位企業(yè)郵箱 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 119K |
| 代理商： | M66221FP |
MITSUBISHI
DIGITAL ASSP
M66221SP/FP
256
×
9-BIT MAIL-BOX
6
SWITCHING CHARACTERISTICS
(T
a
= 0 ~ 70
°
C, Vcc = 5V
±
10%, unless otherwise noted)
Read cycle
Symbol
t
CR
t
a(A)
t
a(CS)
t
a(OE)
t
dis(CS)
t
dis(OE)
t
en(CS)
t
en(OE)
t
v(A)
Parameter
Read cycle time
Address access time
Chip select access time
Output enable access time
Output disable time after CS (Note 5)
Output disable time after OE (Note 5)
Output enable time after CS (Note 5)
Output enable time after OE (Note 5)
Data effective time after Address
Limits
Typ.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
70
70
35
35
35
Min.
70
5
5
10
TIMING REQUIREMENTS
(T
a
= 0 ~ 70
°
C, Vcc = 5V
±
10%, unless otherwise noted)
Write cycle
Symbol
t
CW
t
w(WE)
t
su(A)
t
su(A-WEH)
t
su(CS)
t
su(D)
t
h(D)
t
rec(WE)
t
dis(WE)
t
dis(OE)
t
en(WE)
Parameter
Write cycle time
Write pulse width
Address setup time
Address setup time for rise of WE
Chip select setup time (for WE)
Data setup time
Data hold time
Write recovery time
Output disable time after WE (Note 5)
Output disable time after OE (Note 5)
Output enable time after WE (Note 5)
Limits
Typ.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
35
35
Min.
70
45
0
65
65
40
0
0
0
Note 5: The time required for the output to change from a steady state to
±
500mV under the load conditions shown in Fig. 2.
This parameter is guaranteed but is not tested at shipment.
NOT READY TIMING
(T
a
= 0 ~ 70
°
C, Vcc = 5V
±
10%, unless otherwise noted)
Symbol
t
NAA
t
NDA
t
NAC
t
NDC
t
APS
t
NO
t
NW
Parameter
Not Ready access time from Address
Not Ready disable time from Address
Not Ready access time from CS
Not Ready disable time from CS
Arbitration priority setup time
Data output access time from Not Ready
Write hold time from Not Ready
Limits
Typ.
Unit
ns
ns
ns
ns
ns
ns
ns
Max.
50
50
50
50
0
Min.
15
65
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66221SP | 256 x 9-BIT MAIL-BOX |
| M66230FP | A2RT(ADVANCED ASYNCHRONOUS RECEIVER & TRANSMITTER) |
| M66230P | A2RT(ADVANCED ASYNCHRONOUS RECEIVER & TRANSMITTER) |
| M66235 | STANDARD CLOCK GENERATOR |
| M66235FP | STANDARD CLOCK GENERATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66221SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256 x 9-BIT MAIL-BOX |
| M66222FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128 x 8-BIT x 2 MAIL-BOX |
| M66222SP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:128*8-BIT*2 MAIL-BOX |
| M66223FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Mail Box That Incorporates a Complete CMOS Shared Memory Cell |
| M66230FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:A2RT(ADVANCED ASYNCHRONOUS RECEIVER & TRANSMITTER) |
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