參數(shù)資料
型號(hào): M66221SP
廠商: Mitsubishi Electric Corporation
英文描述: 256 x 9-BIT MAIL-BOX
中文描述: 256 × 9位企業(yè)郵箱
文件頁(yè)數(shù): 2/11頁(yè)
文件大小: 119K
代理商: M66221SP
MITSUBISHI
DIGITAL ASSP
M66221SP/FP
256
×
9-BIT MAIL-BOX
2
Table 1 Mode Settings of Ports
(A
0
A ~ A
7
A
A
0
B ~ A
7
B)
A port input
B port input
Flag
CSA
H
×
L
L
×
×
WEA
×
×
L
H
×
×
OEA
×
×
×
L
×
×
CSB
×
H
×
×
L
L
WEB
×
×
×
×
L
H
OEB
×
×
×
×
×
L
Not
Ready A
H
H
H
H
H
H
Not
Ready B
H
H
H
H
H
H
Operation
A port is set to the non-select mode.
B port is set to the non-select mode.
A port is set to the write mode for memory.
A port is set to the read mode for memory.
B port is set to the write mode for memory.
B port is set to the read mode for memory.
Table 2 Basic Functions of Ports
BLOCK DIAGRAM
CS
H
L
L
L
WE
×
L
H
H
OE
×
×
L
H
Mode
Non-select
Write
Read
I/O pin
High impedance
D
IN
D
OUT
High impedance
I
CC
Stand-by
Operation
Operation
Operation
Note 1:
×
indicates “L” or “H”. (Irrelevant)
“H” = High level, “L” = Low level
Not Ready A
WEA
CSA
OEA
I/O
0
A
I/O
1
A
I/O
2
A
I/O
3
A
I/O
4
A
I/O
5
A
I/O
6
A
I/O
7
A
I/O
8
A
A
0
A
A
1
A
A
2
A
A
3
A
A
4
A
A
5
A
A
6
A
A
7
A
WRITE ENABLE
INPUT
CHIP SELECT
INPUT
OUTPUT ENABLE
INPUT
A PORT
DATA I/O
A PORT
ADDRESS
INPUT
9
8
CONTROL
CIRCUIT
I/O BUFFER
ROW/COLUMN
DECODER
ARBITRATION
CIRCUIT
MEMORY ARRAY OF
256-WORD
×
9-BIT
CONFIGURATION
CONTROL
CIRCUIT
I/O BUFFER
ROW/COLUMN
DECODER
Not Ready B
WEB
CSB
OEB
I/O
0
B
I/O
1
B
I/O
2
B
I/O
3
B
I/O
4
B
I/O
5
B
I/O
6
B
I/O
7
B
I/O
8
B
A
0
B
A
1
B
A
2
B
A
3
B
A
4
B
A
5
B
A
6
B
A
7
B
WRITE ENABLE
INPUT
CHIP SELECT
INPUT
OUTPUT ENABLE
INPUT
B PORT
DATA I/O
B PORT
ADDRESS
INPUT
V
CC
9
8
GND
OEA
WEA
WEB
OEB
A
0
A
A
7
A
~
A
0
B
A
7
B
~
NOT READY
OUTPUT
NOT READY
OUTPUT
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