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參數(shù)資料
| 型號(hào)： | M66258 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 8192 x 8-BIT LINE MEMORY |
| 中文描述： | 8192 × 8位線記憶 |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大小： | 114K |
| 代理商： | M66258 |
8192 x 8-BIT LINE MEMORY
M66258FP
MITSUBISHI <DIGITAL ASSP>
PIN CONFIGURATION (TOP VIEW)
DESCRIPTION
The M66258FP is high speed line memory that uses high
performance silicon gate CMOS process technology and adopts
the FIFO (First In First Out) structure consisting of 8192 words x 8
bits.
The M66258FP, performing reading and writing operations at
different cycles independently and asynchronously, is optimal for
buffer memory to be used between equipment of different data
processing speeds.
FEATURES
Memory configuration
High speed cycle
High speed access
Output hold
Reading and writing operations can be completely carried out
independently and asynchronously.
Variable length delay bit
Input/output
TTL direct connection allowable
Output
3 states
8192 words x 8 bits configuration
20 ns (Min.)
16 ns (Max.)
3 ns (Min.)
APPLICATION
Digital copying machine
,
laser beam printer, high speed facsimile,
etc.
FUNCTIONAL DESCRIPTION
When write enable input WE is set to "L", the contents of data
inputs D0 to D7 are read in synchronization with a rising edge of
write lock input WCK to perform writing operation. When this is the
case,the write address counter is also incremented simultaneously.
When WE is set to "H", the writing operation is inhibited and the
write address counter stops.
When write reset input WRES is set to "L", the write address
counter is initialized.
When read enable input RE is set to "L", the contents of memory
are output to data outputs Q0 to Q7 in synchronization with a rising
edge of read clock input RCK to perform reading operation. When
this is the case, the read address counter is incremented
simultaneously.
When RE is set to "H", the reading operation is inhibited and the
read address counter stops. The outputs are placed in a high
impedance state.
When read reset input RRES is set to "L", the read address
counter is initialized.
Outline 24P2U-A(SSOP)
24
21
22
23
1
4
3
2
20
5
19
6
16
9
15
10
14
11
13
12
7
8
18
17
Q3
Q0
Q1
Q2
RE
RRES
D0
D1
D2
D3
WE
WRES
M
Q5
GND
RCK
Q4
Q6
Q7
V
CC
WCK
D4
D5
D6
D7
DATA OUTPUT
READ ENABLE
INPUT
READ RESET
INPUT
READ CLOCK
INPUT
DATA OUTPUT
DATA INPUT
WRITE ENABLE
INPUT
WRITE RESET
INPUT
WRITE CLOCK
INPUT
DATA INPUT
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M66258FP | 8192 x 8-BIT LINE MEMORY |
| M66260FP | 8 x 4 CROSSPOINT SWITCH with MIXING FUNCTION |
| M66261FP | 6 x 5 CROSSPOINT SWITCH with MIXING FUNCTION |
| M66271FP | OPERATION PANEL CONTROLLER |
| M66272 | LCD CONTROLLER with VRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66258FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
| M66258FP(#TF0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66260FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8 x 4 CROSSPOINT SWITCH with MIXING FUNCTION |
| M66261FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:6 x 5 CROSSPOINT SWITCH with MIXING FUNCTION |
| M66271FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:OPERATION PANEL CONTROLLER |
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