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參數資料
| 型號： | M68AF031AM55N1F |
| 廠商： | 意法半導體 |
| 英文描述： | 256 Kbit (32K x 8) 5.0V Asynchronous SRAM |
| 中文描述： | 256千位（32K的× 8）5.0V異步SRAM |
| 文件頁數： | 15/22頁 |
| 文件大?。?/td> | 383K |
| 代理商： | M68AF031AM55N1F |
15/22
M68AF031A
Table 9. Low V
CC
Data Retention Characteristics
Symbol
Parameter
Note: 1. All other Inputs at V
IH
≥
V
CC
–0.2V or V
IL
≤
0.2V.
2. Tested initially and after any design or process changes that may affect these parameters. t
AVAV
is Read cycle time.
3. No input may exceed V
CC
+0.2V.
Test Condition
Min
Typ
Max
Unit
I
CCDR (1)
Supply Current (Data Retention)
V
CC
= 2.0V,
E
≥
V
CC
–0.2V, f = 0
(3)
6
μA
t
CDR (1,2)
Chip Deselected to Data Retention
Time
0
ns
t
R (2)
Operation Recovery Time
t
AVAV
ns
V
DR (1)
Supply Voltage (Data Retention)
E
≥
V
CC
–0.2V, f = 0
2.0
V
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相關代理商/技術參數 |
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| M68AF031AM55N1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Kbit (32K x 8) 5.0V Asynchronous SRAM |
| M68AF031AM55N6 | 制造商:STMicroelectronics 功能描述: |
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| M68AF031AM55N6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Kbit (32K x 8) 5.0V Asynchronous SRAM |
| M68AF031AM55N6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Kbit (32K x 8) 5.0V Asynchronous SRAM |
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