參數(shù)資料
型號: M68AW031AL70NS6U
廠商: 意法半導體
英文描述: CLAMP
中文描述: 256千位(32K的× 8)3.0V異步SRAM
文件頁數(shù): 10/20頁
文件大?。?/td> 147K
代理商: M68AW031AL70NS6U
M68AW031A
10/19
Table 7. Read and Standby Mode AC Characteristics
Note: 1. Test conditions assume transition timing reference level = 0.3V
CC
or 0.7V
CC
.
2. At any given temperature and voltage condition, t
GHQZ
is less than t
GLQX
and t
EHQZ
is less than t
ELQX
for any given device.
3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
4. Tested initially and after any design or process changes that may affect these parameters.
Symbol
Parameter
M68AW031A
Unit
70
t
AVAV
Read Cycle Time
Min
70
ns
t
AVQV
Address Valid to Output Valid
Max
70
ns
t
AXQX (1)
Data hold from address change
Min
10
ns
t
EHQZ(2,3)
Chip Enable High to Output Hi-Z
Max
25
ns
t
ELQV
Chip Enable Low to Output Valid
Max
70
ns
t
ELQX (1)
Chip Enable Low to Output Transition
Min
10
ns
t
GHQZ (2,3)
Output Enable High to Output Hi-Z
Max
25
ns
t
GLQV
Output Enable Low to Output Valid
Max
35
ns
t
GLQX (1)
Output Enable Low to Output Transition
Min
5
ns
t
PD (4)
Chip Enable High to Power Down
Max
0
ns
t
PU (4)
Chip Enable Low to Power Up
Min
70
ns
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