參數(shù)資料
型號(hào): M68AW064FL70ZB6T
廠商: 意法半導(dǎo)體
英文描述: 1 Mbit 64K x16 3.0V Asynchronous SRAM
中文描述: 1兆位64K的x16 3.0V異步SRAM
文件頁(yè)數(shù): 14/18頁(yè)
文件大?。?/td> 265K
代理商: M68AW064FL70ZB6T
M68AW064F
14/18
Figure 12. Low V
CC
Data Retention AC Waveforms
Table 9. Low V
CC
Data Retention Characteristics
Symbol
Parameter
Note: 1. All other Inputs at V
IH
V
CC
–0.2V or V
IL
0.2V.
2. See Figure 12 for measurement points. Guaranteed but not tested.
t
AVAV
is Read cycle time.
3. No input may exceed V
CC
+0.3V.
Test Condition
Min
Typ
Max
Unit
I
CCDR (1)
Supply Current (Data Retention)
V
CC
= 2.0V, E
V
CC
–0.3V, f = 0
(3)
0.5
15
μA
t
CDR (1,2)
Chip Deselected to Data
Retention Time
E
V
CC
–0.3V, f = 0
t
AVAV
ns
t
R (2)
Operation Recovery Time
0
ns
V
DR (1)
Supply Voltage (Data Retention)
E
V
CC
–0.3V, f = 0
2.0
3.6
V
AI04885
DATA RETENTION MODE
tR
3.6V
tCDR
VCC 3.3V
VDR > 2.0V
E
E
VDR – 0.2V
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